- 學位論文
在電源轉換器中使用數位化控制以達成快速負載暫態響應
Achieving Fast Load Transient Response Using Digital Control in a DC Converter
摘要
為了能夠穩定供電給電腦的中央處理單元(CPU)，電壓調節器(VR)不僅要在穩態時能夠穩定地調節電壓，對於負載產生瞬間變化時也要能夠快速反應，避免輸出電壓變化過大。為了響應CPU電源在現今的節能趨勢，VR的特性就顯得十分重要。本論文之研究焦點在於一個能夠在CPU產生步階負載變化時，快速使其供應電壓回復之控制架構，其名為時間最佳化控制法(Time-Optimal Control, TOC)。其主要構想為使用兩個控制迴路來控制VR，其中的線性回授控制器在系統達穩態時工作。一旦負載發生變化，便由將控制器切換至TOC控制器已達到電壓快速回復以及減小電壓變化量。由於系統架構複雜，故使用數位化控制來實現。 在本論文中首先將回顧傳統的兩種TOC實現方法，即所謂的時間式TOC與電壓式TOC。TOC控制法之基本原理：電容電荷平衡法則，將會於本論文中做解釋。TOC之實現法為在負載暫態期間，電晶體不再是以定頻的脈寬調變做開關動作，而是將電晶體開關持續開啟或是關閉一段經由計算所得的時間長度。由於計算時間長度需要十分複雜的演算法，因此通常透過數位化之方式來實現。然而當輸出電容之寄生電阻(RC)大到不可忽略時，傳統的兩種TOC控制法便不再適用，此情形於電解質電容上尤其明顯。在本論文之中便提出了一個新的演算法以解決RC造成之影響，此方法是需藉由輸出電壓之斜率已得到開關所需之開啟與關閉時間，其理論與數學推導皆已在本論文中做解釋，並且藉由模擬與硬體電路實驗來驗證此理論。硬體電路之開迴路測試已經完成，驗證了理論的正確性，但是閉迴路測試未完成，因此閉迴路驗證需更待未來研究之努力。
並列摘要
To power a central processor unit (CPU) of a computer, a voltage regulator(VR) must not only provide a well-regulated voltage during the steady- state load but also maintain a small voltage spike/dip with fast transient voltage recovery during step-load changes. These VR features are very important to achieve the power requirements of modern-day energy-saving CPUs. The focus of the thesis is to investigate a voltage fast-recovery scheme, called time-optimum control (TOC), for dealing with the frequent step-load transient of a CPU. The idea is that the VR can be controlled by two control loops, one is the linear feedback scheme which is used during steady-state load and the other is the TOC scheme, which takes over and speeds up the recovery when load transient occurs. A digital control technique was employed for both control loops to accomplish such a challenging task. In the thesis, conventional TOC controls including the so-called voltage-based and the time-based control, was be reviewed first. The basic principle of all TOC technique, the output capacitor charge balance, was explained. The algorithm for a fast recovery is for the converter main switch to turn on or turn off for a predicted time instead of still using pulse-width modulation during the transient. The algorithm for calculating the predicted time is so complicated mathematically that it is normally implemented by digital means. However, the two conventional algorithm mentioned above fail to accomplish the purpose when the output capacitor parasitic resistance is significant, which is true for many practical electrolytic capacitors. In the thesis, a new algorithm was proposed to solve the problem. This algorithm is based on using the slope of the output voltage for predicting the necessary one-shot on time of the main switch. The theory and the mathematic involved were explained. Simulation and hardware experiments were run to verify the proposed algorithm. An open feedback loop test proved that the algorithm is valid. Future work along this line is suggested for future research.
參考文獻
延伸閱讀
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