可應用於物聯網之十位元低功耗連續近似類比數位轉換器利用輸入電壓適應性電容切換技術

本論文提出一個可應用於物聯網之十位元低電壓及高能源效率連續近似(SAR)類比數位轉換器(ADC)。為達到良好功率消耗表現，本論文所提出之類比數位轉換器操作於超低電壓的0.35伏特至0.5伏特。此架構重複利用比較器(comparator)，在比較雙端輸入電壓值時，同時將輸入電壓轉化成時域資訊，並利用時域量化器(time-domain quantizer)在同一比較週期內直接判斷輸入電壓之電壓範圍。此類比數位轉換器基於Vcm-based切換方式提出具輸入電壓適應性(input-range-adaptive)的電容切換方式，此方式可以維持固定的共模準位電壓，並大幅節省類比數位轉換器(DAC)之電容切換耗能。為驗證本電路，此架構使用90奈米1P9M互補式金氧半導體製程製作，晶片總面積為1133×1133μm2，核心電路面積為390×97μm2，在0.35至0.5伏特電源電壓及相對應的300千至2百萬赫茲取樣頻率操作下，此晶片在Nyquist頻率訊號輸入時實現之SNDR為從55.5至56.3dB，其對應的ENOB為8.92至9.06bit，功率消耗為0.3至2.5微瓦，等效的figure of merit (FoM)為1.94至2.32fJ/conversion-step。

關鍵字

連續近似類比數位轉換器；低電壓；低功耗

並列摘要

This thesis presents an ultra-low voltage and power-efficient 10-bit successive-approximation register (SAR) analog-to-digital converter (ADC) for Internet of Things (IoT). The proposed ADC operates at ultra-low supply voltage from 0.35V to 0.5V to save power consumption. This architecture reuses a comparator as a voltage-to-time converter and implements a time-domain quantizer. The comparator converts voltage difference of input signal sampled on DACs to MSB result and the corresponding comparison time simultaneously, and then time-domain quantizer detects the input range. An input-range-adaptive (IRA) switching method is proposed to significantly reduce the average switching power of capacitive-DAC (CDAC) and keep common-mode voltage constant. The prototype was fabricated in 90nm 1P9M CMOS technology with a core area of 390×97μm2. At 0.35V-to-0.5V supply voltage and 300kS/s-to-2MS/s sampling rate, the ADC achieves SNDR from 55.5dB to 56.3dB corresponding ENOB from 8.92bit to 9.06bit at Nyquist-frequency input and consumes power from 0.3μW to 2.5μW, resulting in a figure of merit (FoM) from 1.94 fJ/conversion-step to 2.32fJ/conversion-step.

並列關鍵字

SAR ADC ； low voltage ； low power

參考文獻

[1] W. Fan and Y. Li. (2010, May. 10). Opportunities, Challenges and Practices of the Internet of Things [Online]. Available: http://wwwen.zte.com.cn/endata/magazine/ztetechnologies/2010/no5/articles/201005/t20100510_184418.html

[2] H. Chen, B. Wei, and D. Ma, "Energy Storage and Management System With Carbon Nanotube Supercapacitor and Multidirectional Power Delivery Capability for Autonomous Wireless Sensor Nodes," IEEE Trans. Power Electronics, vol. 25, pp. 2897-2909, Sep. 2010.

[4] T. C. Carusone, D. A. Johns, and K. W. Martin, Analog Integrated Circuit Design, 2nd ed.: WILEY, 2012.

[5] R. J. Baker, CMOS: Circuit Design, Layout, and Simulation, 3rd ed.: WILEY, 2010.

[6] M. Ahmadi and N. Won, "A 3.3fJ/conversion-step 250kS/s 10b SAR ADC using optimized vote allocation," in Prom. IEEE Custom Integrated Circuits Conf. (CICC), 2013, pp. 1-4.

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可應用於物聯網之十位元低功耗連續近似類比數位轉換器利用輸入電壓適應性電容切換技術

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