第二代模糊推論處理器之設計與研究

Hardware Design of Type-2 Fuzzy Inference Processor

陳奕融(Yi-Rung Chen)

指導教授 ： 黃世旭

中原大學/工學院/電子工程研究所/碩士(2004年)

https://doi.org/10.6840/cycu200400240

摘要

現今第二代模糊邏輯理論是以Zadeh所提出的延伸定理為基礎，其觀念為”對同一件事物的形容，不同人會有不同的語義形容詞”的集合論上定義，此為模糊集合上最主要的不確定因素。在本篇論文中，我們提出一個適用類梯形歸屬函數之第二代模糊推論處理器。我們所提出的架構，特色在於利用間隔集合(Interval Set)的特性套用上第二代模糊理論，經由管線化與平行化的技術設計出第一個具備第二代模糊推論能力之硬體系統架構，並將高複雜度的不確定因素效應(Uncertainties)也考慮在其中設計與測試。我們使用TSMC 0.35 μm標準元件庫，來實現此模糊推論處理器。經由時序分析，我們可以發現其推論速度可達3.125 MFLIPS。就我們瞭解，此為目前唯一將第二代模糊推論系統導入硬體架構設計的研究成果。

關鍵字

模糊推論處理器

並列摘要

Type-2 Fuzzy Logic is based on the extension principle proposed by Zadeh. The main concept of type-2 fuzzy logic is that “words mean different things to different people”; thus, there are uncertainties associated words. In this paper, we propose a type-2 fuzzy inference processor that is well suited for trapezoid-shaped membership functions. To the best of our knowledge, our architecture is the first hardware implementation for type-2 fuzzy inference execution. The main feature of the proposed architecture is that it can utilize the features of interval sets based on type-2 fuzzy theorem. Therefore, the uncertainties can be taken into account. Moreover, in order to speedup the inference execution, the pipeline and parallelism techniques are exploited. We use TSMC 0.35 μm standard cell library to implement the proposed architecture. Implementation data shows that the inference speed reaches up to 3.125 MFLIPS. According to our research, the processor is unique implementation designed with type-2 fuzzy theorem.

並列關鍵字

fuzzy set ； fuzzy inference processor

參考文獻

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