以雙向線性反饋移位暫存器產生測試式樣序列的方法

Test Pattern Sequence Generation by Using Bidirectional Linear Feedback Shift Registers ( LFSRs )

何鎮宏(Jhen-Hong He)

指導教授 ： 謝財明

中原大學/工學院/資訊工程研究所/碩士(2014年)

https://doi.org/10.6840/cycu201400126

摘要

隨著製程技術的進步，晶片上單位面積內可容許的電晶體數量也大幅提升，使得測試階段必需花費更大量的時間和成本去驗證電路的正確性，常見的測試方法中主要分二類，一類為外部測試( external testing )，如自動測試機台( Automatic Test Equipments，ATE )可以快速的自行產生測試式樣( Test pattern )且驗證，但是需要較高的硬體成本，第二類為內建自我測試( Build-In-Self-Test，BIST )，相較於外部測試，它不需要花費大量的硬體成本及可達到測試的目的。
線性反饋位移暫存( Linear Feedback Shift Registers，LFSR )是用來產生近隨機測試式樣( pseudo-random test pattern )，可以使 BIST 能以較低的硬體實現測試驗證。然而傳統的LFSR在做電路測試上還是沒有比較好的錯誤覆蓋率( fault coverage )，而且缺乏系統化設計產生測試式樣電路的方法，因此本論文擬提出一個新的線性反饋雙向移位暫存器( Bidirectional shift register )架構及系統化設計方法，從已知的測試式樣中分析且有系統化的設計出一個找出測試式樣序列的方法，可達到高錯誤覆蓋率，和找到最短的測試式樣序列以減少測試時間，而每一次位移都只有一個位元0或1的變化，進而能降低測試功率的消耗。
我們將CAD96[12]所提供的測試檔案進行測試且分析其結果，藉由分析單向位移和雙向位移的差異，我們可發現雙向所找到測試式樣序列比單向尋找的還要來的短，雖然所需要的邏輯閘數量比較多，可是能縮短測試的時間。

關鍵字

內建自我測試 ； 測試式樣 ； 漢明爾頓迴圈 ； 線路最小化 ； 線性反饋位移暫存 ； 雙向位移暫存器

並列摘要

With the progress of IC manufacturing, the number of transistors on the chip is increased. Thereby, the IC designer will spend more time to verify the correctness of chip. There are two main ways for IC testing. The first one is external testing such as Automatic Test Equipments (ATE). It can auto generate the test pattern and have better fault coverage. However, the ATE is very expensive. The second method is Build-In-Self-Test (BIST). Different from ATE, the BIST can accomplish the testing without spending too much hardware overhead.
Linear Feedback Shift Registers (LFSR) is widely adopted as the pseudo-random test pattern generator for BIST, due to its low hardware overhead. However, there are many faults are hardly detected by the traditional LFSR. To achieve the better fault coverage and testing cycle, we want to propose a new test pattern generation LFSR architecture by using bidirectional shifter register.
By analyzing target test vectors, we can systematically design a test pattern generator which has better fault coverage and shortest generation sequence. Because each shifting only cost one bit change, we can also reduce the power consumption.
Our benchmark is provided by CAD96 [12]. By comparing the difference between one-way and two-way test pattern generator, we can observe that the generation sequence length of two-way test pattern generator is shorter than one way. Although the two-way test pattern generator expenses more gates to design the circuit, we can come to better testing time.

並列關鍵字

Hamilton cycle ； bidirectional Shift Register ； Build-In-Self-Test ； shortest path circuit minimization ； test pattern ； Linear Feedback Shift Registers

參考文獻

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