嵌入式Java加速器系統設計

Design of Java Accelerator IP for Embedded Systems

郭瀚文(Han-Wen Kuo)

指導教授 ： 蔡淳仁

國立交通大學/資訊學院/資訊科學與工程研究所/碩士(2011年)

https://doi.org/10.6842/NCTU.2011.00926

摘要

Abstract
Java Runtime Environment (JRE) is becoming a popular application platform for complex multimedia embedded systems today. In this thesis, we present the architecture design of a reusable Java accelerator IP for application processors for embedded systems. The accelerator IP cooperate with a general purpose processor (GPP) core to support the JRE. The GPP core is responsible for running service routines to support Java tasks such as I/O requests, dynamic class loading, heap memory management, etc. The proposed Java accelerator IP is a double-issue Java core in charge of execution of the Java applications. More importantly, it is easy to integrate such Java accelerator IP into existing embedded systems both hardware-wise and software-wise. On the software side, it does not rely on any full-blown OS (such as Linux) running on the GPP. Only a thin kernel that maintains the execution of interrupt-driven Java service routines is necessary to support the JRE. On the hardware side, the communication between the Java accelerator IP and the GPP core is achieved using a memory sharing table and an interrupt-driven mailbox device. The proposed Java embedded platform with the Java accelerator IP has been implemented on the Xilinx Virtex-5 ML507 FPGA development board.

關鍵字

系統晶片 ； Java執行環境 ； Java處理器 ； Java加速器 ； 動態類別載入 ； 嵌入式系統

並列摘要

Abstract
Java Runtime Environment (JRE) is becoming a popular application platform for complex multimedia embedded systems today. In this thesis, we present the architecture design of a reusable Java accelerator IP for application processors for embedded systems. The accelerator IP cooperate with a general purpose processor (GPP) core to support the JRE. The GPP core is responsible for running service routines to support Java tasks such as I/O requests, dynamic class loading, heap memory management, etc. The proposed Java accelerator IP is a double-issue Java core in charge of execution of the Java applications. More importantly, it is easy to integrate such Java accelerator IP into existing embedded systems both hardware-wise and software-wise. On the software side, it does not rely on any full-blown OS (such as Linux) running on the GPP. Only a thin kernel that maintains the execution of interrupt-driven Java service routines is necessary to support the JRE. On the hardware side, the communication between the Java accelerator IP and the GPP core is achieved using a memory sharing table and an interrupt-driven mailbox device. The proposed Java embedded platform with the Java accelerator IP has been implemented on the Xilinx Virtex-5 ML507 FPGA development board.

並列關鍵字

SoC ； JRE ； Java processor ； Java accelerator IP ； Dynamic class loading ； Embedded system

參考文獻

[1] H.-J. Ko and C.-J. Tsai, “A Double-issue Java Processor Design for Embedded Application,” Proc. of IEEE Int. Symp. on Circuits and Systems(ISCAS’08), Seattle, May. 2007.

[2] H.-J. Ko, A Double-issue Java Processor Design for Embedded Application, Mater thesis, NCTU, 2007.

[3] K.-N. Su and C.-J. Tsai, “Fast Host Service Interface Design for Embedded Java Application Processors,” Proc. of IEEE Int. Symp. on Circuits and Systems (ISCAS’09) ,Taipei, May, 2009.

[4] K.-N. Su, Design of Heterogeneous Dual-Core Java Application Processor for Embedded Applications, Mater thesis, NCTU, 2009.

[5] C.-F. Hwang, K.-N. Su and C.-J. Tsai,” Low-Cost Class Caching Mechanism for Java SoC,” Proc. of IEEE Int. Symp. on Circuits and Systems(ISCAS’10), Paris, May. 2010.