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  • 學位論文

連通柱不連續結構之雜訊分析與改善

Noise Analysis and Reduction of Via Discontinuity Structure

指導教授 : 薛光華

摘要


近年來,數位電子產品的外觀設計均朝向輕、薄、短、小等特色。而產品規格則是不斷提升工作頻率、加大傳輸頻寬與降低工作電壓,在此前提下,印刷電路板的結構也必須隨之而改變。為了因應不斷縮小的印刷電路板尺寸,多層板結構能提供線路在佈線上更多的空間,而連通柱(Via)正是訊號線在垂直方向的換層連接方式。然而這樣的連通柱結構,通常呈現為電容與電感兩種效應,隨著電路工作頻率的提高與工作電壓下降的趨勢下,對於訊號品質的不良影響漸漸地變的更不容忽視。 本論文主要在改善連通柱所造成的不連續效應,首先針對埋入式連通柱(Buried Via)結構所造成的訊號完整性問題作分析與改善。作法為將與連通柱焊墊(Via Pad) 上下相鄰的平面層,剃除掉與連通柱焊墊大小相仿的區域。透過軟體模擬顯示,反射損失可獲得良好的改善效果。對於多層印刷電路板常見的開路殘段連通柱,利用空氣連通柱(Air Via)的結構,將空氣連通柱緊鄰在連通柱旁設置,這樣的改善方式可以將連通柱的特性阻抗值提高,同時減小連通柱的電容效應。在模擬與實驗結果中,連通柱的特性阻抗值與電容效應均可獲得明顯的改善。

關鍵字

訊號完整性 連通柱

並列摘要


In the multilayer printed circuit boards (PCBs), the planting through-hole via transitions is utilized to connect the signal traces between different layers. As the data rates increase up to GHz range, it must to be considered the significant impact of via on signal integrity of high-speed digital systems. From lots of researches, the characteristic of via could be found in capacitive and would cause a voltage drop in the time-domain reflectometry (TDR) waveform. To reduce this reflection noise, this thesis describes a systematic design procedure to improve the electrical performance of multilayer through-hole via transitions by using the high-impedance interconnects. A better and useful structure is proposed by avoiding the metal plane under or above the pad of buried via hole. The characteristic impedance of signal via can be improved and matched by using this structure. A novel structure is proposed by adding air via hole closed to via stub of planting through-hole to decrease capacitive and increase characteristic impedance of signal via. This method is demonstrated by the time-domain simulation and measurements, accordingly.

並列關鍵字

Via hole Signal Integrity

參考文獻


[10] H. W. Johnson and M. Graham, High-speed Signal Propagation, Chapter 5,Prentice-Hall, 1993.
[2] S. H. Hall, G. W. Hall, and J. A. McCall, High-Speed Digital System Design, John Wiley & Sons, INC., 2000.
[4] Qiuxiaofeng. *Wu Yuslmu, Li Sliufang ,YingClenguang ,Gao Yougang, “Simulation and Analysis of Via Effects on High Speed SignalTransmission on PCB,”IEEE Radio Science Conference, 2004. Proceedings. 2004 Asia-Pacific, pp.283-286
[5] T. Wang, R. F. Harrington, and J. R. Mautz, “Quasi-static analysis of a microstrip via through a hole in a ground plane,” IEEE Trans. Microwave Theory Tech., vol. 36, pp. 1008-1013, June 1988.
[6] E. Pillai and W. Wiesbeck, “Derivation of equivalent circuits for multilayer printed circuit board discontinuities using full wave models,” IEEE Trans. Microwave Theory Tech., vol. 42, pp.1774-1783, September 1994.

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