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  • 學位論文

一個頁級轉換固態硬碟下擁有自適性、低成本的垃圾收集策略

ADAPTIVE, LOW-COST GARBAGE COLLECTION FOR PAGE-LEVEL MAPPING SOLID-STATE DISKS

指導教授 : 張立平

摘要


Embedded systems is among one of the most blooming areas in the industry and the academics. Among the various kinds of storage media for embedded systems, flash memory has won his edge over other media because of its non-volatile, shock-resistant, and power-economic nature. Due to the very different characteristics of flash memory, traditional designs for storage systems are not suitable to flash memory. Improper management of flash memory could introduce various unexpected system behaviors and overheads to users. Internal garbage collection and wear-levelling activities might result in a significant degradation over the system performance and reduce the lifetime of flash memory. In this thesis, we investigate several important issues for the design of flash memory storage systems for embedded systems. We propose an architectural approach to significantly improve the write performance, which is usually considered as a bottleneck of flash-memory storage systems. In order to provide a deterministic storage system performance for hard-real-time embedded system applications, a real-time garbage collection mechanism is designed to properly manage garbage collection and wear-levelling activities. An energy-efficient scheduling algorithm is also introduced to optimize energy dissipations contributed by flash-memory storage systems so that the operating time of such mobile devices could be lengthened. We then address the scalability problem of flash-memory storage systems with an observation on the rapidly increasing of the capacity of flash memory. An adaptive flash memory management scheme is presented to significantly reduce the RAM footprint for the management. The ideas and the results presented in this work could be very beneficial to the future designs of flash-memory storage systems.

並列摘要


Embedded systems is among one of the most blooming areas in the industry and the academics. Among the various kinds of storage media for embedded systems, flash memory has won his edge over other media because of its non-volatile, shock-resistant, and power-economic nature. Due to the very different characteristics of flash memory, traditional designs for storage systems are not suitable to flash memory. Improper management of flash memory could introduce various unexpected system behaviors and overheads to users. Internal garbage collection and wear-levelling activities might result in a significant degradation over the system performance and reduce the lifetime of flash memory. In this thesis, we investigate several important issues for the design of flash memory storage systems for embedded systems. We propose an architectural approach to significantly improve the write performance, which is usually considered as a bottleneck of flash-memory storage systems. In order to provide a deterministic storage system performance for hard-real-time embedded system applications, a real-time garbage collection mechanism is designed to properly manage garbage collection and wear-levelling activities. An energy-efficient scheduling algorithm is also introduced to optimize energy dissipations contributed by flash-memory storage systems so that the operating time of such mobile devices could be lengthened. We then address the scalability problem of flash-memory storage systems with an observation on the rapidly increasing of the capacity of flash memory. An adaptive flash memory management scheme is presented to significantly reduce the RAM footprint for the management. The ideas and the results presented in this work could be very beneficial to the future designs of flash-memory storage systems.

參考文獻


[9] M. L. Chiang, C. H. Paul, and R. C. Chang, ``Manage flash memory
[2] Jen-Wei Hsieh, Li-Pin Chang, and Tei-Wei Kuo. 2005. "Efficient on-line identification of hot data for flash-memory management."
[3] Mei-Ling Chiang, Paul C. H. Lee, and Ruei-Chuan Chang. 1999. "Using data clustering to improve cleaning performance for plash memory."Softw. Pract. Exper. 29, 3
[4] Sang-Won Lee, Dong-Joo Park, Tae-Sun Chung, Dong-Ho Lee, Sangwon Park, and Ha-Joo Song. 2007. "A log buffer-based flash translation layer using fully-associative sector translation." ACM Trans. Embed. Comput. Syst. 6, 3, Article 18
[5] Chanik Park, Wonmoon Cheon, Jeonguk Kang, Kangho Roh, Wonhee Cho, and Jin-Soo Kim. 2008. "A reconfigurable FTL (flash translation layer) architecture for NAND flash-based applications." ACM Trans. Embed. Comput. Syst. 7, 4, Article 38

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