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積體電路下線系統的設計與實作:以實體化視觀表重構

Design and Implementation of the Integrated Circuit Tape-out System : Reconstruction with Materialized Views

摘要


積體電路從設計到量產所需耗費的時程為積體電路設計公司營運成功的關鍵工作,此段工作作業時程越短,積體電路設計公司就愈有機會獲得競爭優勢。因此,積體電路設計公司需要定期追蹤積體電路的設計開發、積體電路製作生產,推動量產的作業情形。積體電路下線系統整合公司內部所有可用資源,串聯眾多資訊系統,獲得邏輯和實體設計、下線、光罩和晶圓的製作、晶圓針測與封裝等多項工作的作業情形,甚至量產後的各項統計等。積體電路下線系統實際為一個整合資訊系統,在實務應用中執行效能為其重要議題。本研究運用實體化視觀表重構積體電路下線系統,並完成系統設計,以及於工作場域的實作。實證顯示,在系統重構後針對特定下線資料查詢的回應時間僅為重構前的10.8%,使用實體化視觀表重構系統的效益明顯。

並列摘要


In an IC design process, the most important activities are those from the stage of integrated circuit design to that of production. In the industry, executives and project managers need to monitor the process and the status in the IC design and the production stage. In fact, the integrated circuit tape-out system need to integrate all available resources within the company to equip with the expected function. To reach this goal, the integrated circuit tape-out system may integrate some existing information systems, such as ERD, BPM, ERP, etc. However, the query performance in this system is the critical issue. This research proposed that the use of materialize views to optimize the query performance in the existing integrated circuit tape-out system. The result shows that the query response time in the integrated circuit tape-out system with materialize views is better than that without materialize views.

參考文獻


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