FPGA Based 32 Bit ALU for Automatic Antenna Control Unit

Syed Muhammad Adnan

《Bahria University Journal of Information & Communication Technologies》 6卷1期 (2013/01) Pp. 32-36

並列摘要

Arithmetic logical unit is a critical part of all microprocessor based equipments as it performs all the primary functions. This paper focuses the Implementation of 32 bit ALU on FPGA for the Antenna Control Unit processor. Antenna control unit is a subsystem used in telecommunication to automatically track, monitor and control the RF signals. Our ALU is implemented by using modular approach i, e. Control Unit, Logical Unit, Arithmetic Unit, Relational Operations Unit. Control Unit is a state machine that issues commands for all the operations. Arithmetic Unit performs all mathematical functions and Logical Unit performs binary logic operations on the 16 bit operands. The post place route results on Virtex-6 uses are 85 Slices, with F max of 703.7 MHz while using Virtex-5 it uses 97 Slices with F max of 553.08 MHz.

並列關鍵字

Arithmetic Logic Unit ； Logical Unit ； FPGA ； Efficient implementation