透過您的圖書館登入
IP:216.73.216.60
  • 期刊
  • OpenAccess

Design of a Novel Nanometric Parity Preserving Reversible Diminished-One Modulo 2^n+1 Adder Using Circular Carry Selection

並列摘要


In recent years, reversible logic is of prominent factor in energy efficient computation. Reversible logic circuits play important role in nanotechnology-based systems and have applications in quantum computing, low power CMOS designs, DNA computing, bioinformatics and optical information processing. This paper proposes two efficient hardware architecture of reversible circular carry selection diminished-one modulo 2^4+1 adders which one of them is parity preserving. The proposed reversible circular carry selection diminished-one modulo 2^4+1 adder can be generalized for reversible circular carry selection diminished-one modulo 2^n+1 adder. The parity preserving reversible logic circuit of the m×r partitioned CCS modular adder is also proposed. One of the important interests for a high-performance residue number system is the diminished-one modulo 2^n+1 addition. It is a prominent arithmetic operation for RNS. The circuits are evaluated in terms of number of reversible gates, number of garbage outputs, number of constant inputs, quantum cost and hardware complexity. All the scales are in the nanometric area.

延伸閱讀