Security of systems involved in the ubiquitous applications demands computationally less intensive operations. The proposed work aims at the design of the overall secured system architecture for the resource constrained platforms. The design architecture features; 1) the secured off-chip memory, 2) the master computation unit with a specialized encoding mechanism and 3) the encrypted data transfer to the slaves along with integrity and authentication. The design explores for the first time, the light weight cryptographic algorithms, both a Feistel cipher and a Substitution Permutation cipher (SPN), in its use for security compliance. Exhaustive analyses are made for the implementation results on the xc4VLX15-12sf363 Virtex FPGA. The time overheads for the memory encryption using the light weight Feistel cipher Tiny Encryption Algorithm (TEA) and the SPN cipher PRESENT are estimated for the actual 64-bit and the 16-bit custom derived implementations. The time latency for deriving the integrity and authentication extension to the slaves depicts nominal values acceptable for RFID communication applications.