透過您的圖書館登入
IP:18.218.169.79
  • 期刊

A Simple Logic Controlling and High-Linearity CMOS Bootstrapped Switch

摘要


This paper presents a simple logic controlling and high-linearity bootstrapped sampling switch. A transmission gate was designed to transmit the input signal the gate of the sampling switch for the sake of a fixed gate-source voltage. The proposed scheme was implemented in a 65nm CMOS technology. Simulation results demonstrate that the proposed bootstrapped switch can achieve a SNR of 113dB and SFDR of 75dB at 10 MHz.

參考文獻


L. Wang, W.J. Yin, et al. Dual-channel bootstrapped switch for high-speed high-resolution sampling, Electronics Letters, vol. 42 (2006), 1275-1276.
Y.X. Lu, Z. Li, et al. A full-swing area-efficient high-speed CMOS bootstrapped sampling switch, IEICE Electronics Express, vol. 10 (2013), 1-6.
T. Rabuske, J. Fernandes. A SAR ADC with a MOSCAP-DAC, vol. 51 (2016),1410-1422.
J. Steensgaard. Bootstrapped low-voltage analog switches, Proc IEEE Int Symp Circuits Syst, vol. 2 (1999), II-29-II-32.
R. Hu, J. Tang. A novel bootstrapped switch, Int. Conf. Consum. Electron., Commun. Networks, CECNet - Proc, (2012), 1545-1547.

延伸閱讀