- 學位論文
磷化銦異質接面雙極性電晶體之直流特性分析與模擬
Analysis and Simulation of DC Characteristics of Indium Phosphide Heterojunction Bipolar Transistors (InP HBTs)
摘要
磷化銦異質接面雙載子電晶體（InP HBT）由於具備高電子遷移率、高操作頻率、低導通電壓、良好的線性度等優點，並可以與長波長光纖通訊技術結合，是應用於5G/6G無線通訊系統、高速數位電路以及光纖通訊元件中的最佳選擇。 本研究中成功製作出50×50 μm2 、60×60 μm2 及70×70 μm2三種不同射極尺寸的磷化銦/銻砷化鎵/磷化銦(InP/GaAsSb/InP)雙異質接面雙極性電晶體(DHBT)，並量測了元件在室溫和低溫下的直流特性。首先，利用傳輸線方法(TLM)量測金屬和半導體接觸情形為歐姆接觸。接著量測元件之基極-射極與基極-集極接面之電流與電壓關係圖，展現出二極體曲線，從嘉莫圖(Gummel Plot)及共射極輸出特性曲線萃取出關鍵參數，得到射極尺寸和溫度分別對電流增益和偏移電壓的影響；射極尺寸越大，電流增益及偏移電壓皆越小，而隨著溫度從室溫(300 K)到低溫(77 K)，電流增益及偏移電壓皆變大，並且同時都能保有電晶體的輸出特性，表示HBT對溫度的穩定性好。另外也探討SiN鈍化層對元件特性的影響，發現高溫下成長SiN鈍化層會對元件造成破壞，使最大電流增益從16.4降到7.5，偏移電壓從0.08 V增加到0.17 V，降低了整體元件的性能。 此外，使用吳育任教授團隊開發的二維有限元漂移擴散電荷控制求解器（2D-DDCC） (2D- Drift-diffusion Charge Control solver) 軟體進行數值模擬，透過調整基極區電子遷移率等相關參數，實現不同射極尺寸的HBT元件其嘉莫圖(Gummel Plot)及共射極輸出特性曲線和量測結果的高度一致性，並從低溫下的直流特性量測結果萃取出和溫度有關的參數，探討這些參數對溫度的影響，希望進一步建立溫度依賴的模擬模型，以更準確地預測InP HBT元件在低溫下的實驗行為。
並列摘要
Indium Phosphide Heterojunction Bipolar Transistors (InP HBTs) are ideal for use in 5G/6G wireless communication systems, high-speed digital circuits, and fiber optic communication components due to their high electron mobility, high operating frequency, low turn-on voltage, and good linearity, as well as compatibility with long-wavelength fiber optic communication technologies. In this study, InP/GaAsSb/InP Double Heterojunction Bipolar Transistors (DHBTs) with emitter sizes of 50×50 μm², 60×60 μm², and 70×70 μm² were successfully fabricated, and their DC characteristics were measured at room temperature and low temperature. First, the ohmic contact between the metal-semiconductor interface was verified by measuring TLM patterns. Then, the current-voltage characteristics of the base-emitter and base-collector junctions were measured, demonstrating diode behavior. Some key parameters were extracted from the Gummel plots and common-emitter output characteristics. The results showed that as the emitter size increases, the current gain and offset voltage decrease. However, as the temperature decreases from room temperature (300 K) to low temperature (77 K), the current gain and offset voltage increase while maintaining transistor output characteristics, indicating good thermal stability of the HBTs. The impact of SiN passivation on DC characteristics was also explored. It was found that SiN passivation grown at high temperatures damaged the device, reducing the maximum current gain from 16.4 to 7.5 and increasing the offset voltage from 0.08 to 0.17 V, thus degrading device performance. Furthermore, numerical simulations were performed using the 2D-Drift-Diffusion Charge Control solver (2D-DDCC) developed by Professor Yuh-Renn Wu's team. By adjusting parameters such as electron mobility in the base region, a high degree of consistency was achieved between the simulated and measured Gummel plots and common-emitter output characteristics for HBTs with different emitter sizes. Low-temperature DC characteristics were analyzed to extract temperature-related parameters and hoped to further develop a temperature-dependent simulation model to predict the behavior of InP HBT under low temperatures accurately.