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  • 學位論文

VLSI 電源供應網絡優化

VLSI Power Delivery Network Optimization

指導教授 : 陳中平
本文將於2029/05/13開放下載。若您希望在開放下載時收到通知,可將文章加入收藏

摘要


在先進製程的持續發展下,由於電壓持續下降,帶寬需求又持續上升,電路實體設計的演算法較過往更為困難,因此設計電源供應網絡(PDN)需要充分考慮線寬比、電壓降甚至是熱效應等多個面向,盡可能降低佔有面積來提供繞線更多空間。 本文分為兩部分,分析以及最佳化,分析部份開發基於節點分析法的 voltage drop simulator,在TSMC提供的電路樣本的實驗結果中表明,速度相較於golden tool Synopsys HSPICE在更少的記憶體使用的情況下,達到了39倍快,並將accuracy loss控制在零誤差,並且與IBM 基準測試相比,實現了223倍的加速。 最佳化部分與以往使用序列線性規劃迭代求解不同,本文基於數學規劃法,直接求解原始網絡問題。實驗結果顯示,我們的方法可以有效避免電壓降問題,並且在滿足可靠性約束條件下,優化電源供應網絡的面積。在超過一百萬分支的電源/接地網絡可以在幾分鐘內完成最佳化。

並列摘要


Under the continuous development of advanced processes, the algorithm for physical design has become more difficult due to the continuous reduction in voltage and the increasing demand for bandwidth. Therefore, the design of power delivery networks (PDN) needs to fully consider multiple aspects such as the width and length ratio, voltage drop, and even thermal effects to minimize the area and provide more space for routing. This paper is divided into two parts: analysis and optimization. The analysis section develops a voltage drop simulator based on nodal analysis. Experimental results from circuit samples provided by TSMC indicate that, compared to the golden tool, Synopsys HSPICE, our simulator achieves 39 times speedup with less memory usage and maintains zero error, and achieves 223 times speedup with the IBM benchmark. The optimization part, unlike previous methods that employed iterative solutions with sequential linear programming, solves the original network problem directly through mathematical programming. The experimental results demonstrate that our method can effectively avoid voltage drop issues and optimize the area of the power supply network while satisfying reliability constraints. The optimization of power/ground networks with over one million branches can be completed within a few minutes.

參考文獻


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