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  • 學位論文

使用浮接環形放大器實作的導管式類比數位轉換器

A Pipelined ADC with Floating Ring Amplifiers

指導教授 : 李泰成

摘要


本論文將環形放大器與浮接放大器這兩種放大器作結合,成為浮接環形放大器。這種新型放大器也可以達成高速、高線性度,同時因為前二級並無產生靜態電流,消耗的功率僅為普通環形放大器的一半。我們將浮接環形放大器接在MADC中,並實作一個十位元的導管式類比數位轉換器。 本晶片使用台積電28奈米製程下線,總面積為1.57平方毫米。量測中,使用0.9伏特電源,在八億赫茲的取樣頻率下,可測得44.34分貝的訊號對雜訊失真比,同時僅消耗11.56毫瓦。

並列摘要


In this thesis, we combine two ideas, the ring amplifier and the floating amplifier, to be a brand new type floating ring amplifier. The new amplifier can achieve high speed, high linearity while with a 0.5× power consumption compared to traditional ring amplifiers since there is no static current in the first two stages. The proposed amplifier is applied in the multiplying DAC (MDAC) to fulfill a 10-bit pipelined ADC. The chip is fabricated in a TSMC 28-nm technology and the total area is 1.57 mm2. In measurement, using a 0.9-V supply, the proposed circuit achieves 44.34 dB SNDR at 800 MS/s while consuming 11.56 mW.

參考文獻


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