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  • 學位論文

利用去耦合電容抑制電源接地平面板邊輻射雜訊之分析與設計

Analysis and Design for Suppressing Edge Radiation of Power/Ground Planes by Decoupling Capacitors

指導教授 : 吳瑞北

摘要


本論文主要內容是針對於電源接地平面中所造成的電磁干擾問題,亦即在高速數位電路中影響系統穩定度的關鍵問題。在高速數位電路中,由於許多信號穿層、電源供應與跨槽線的情況,將導致接地彈跳雜訊的發生,使得激發出的電磁波於層板之間來回傳播與反射,並於平板邊緣產生等效磁流源,進而輻射出去產生雜訊,干擾其他電路或系統使之異常或故障,即電磁干擾。本論文提出在電源接地平面之四周圍,利用去耦合電容抑制板邊輻射雜訊,並提出簡化之分析方式,推導出幾何架構與去耦合電容規格以改變對板邊電場的影響;利用合理的簡化方式,找出主要影響遠場輻射雜訊抑制能力之設計參數;並透過解析方法,分析如何使用最低成本以擺放去耦合電容而達到最佳輻射抑制效果;設計步驟最後再使用本論文提出之特定頻率點無輻射之公式,設計出去耦合電容之電容值,並將此點頻率設計在系統中較強的輻射頻率點上,使遠場輻射雜訊的抑制更有效率,收事半功倍之效。最後,舉出設計範例、繪出設計曲線與設計流程圖,方便日後需要時可以直接引用,並利用全波電磁模擬軟體HFSS與GHz橫向電磁波傳輸室(GTEM)量測,以驗證此分析與設計之正確性。

並列摘要


This thesis focuses on the problem of Electromagnetic Interference(EMI)of Printed Circuit Board(PCB)power/ground planes, which is a crucial issue to the whole system stability in the high speed digital circuits. The ground bounce is the primary noise of power/ground planes which arises from the current flowing through a via or the signal trace crossing the slot lines. Bouncing back and forth from the edges of substrate, it will generate a standing wave, and give rise to the radiated emission, usually identified as EMI to the other circuits in the system. The thesis proposed the use of decoupling capacitors around the power/ground planes to suppress the edge radiation noise. A canonical problem simplified from the original structure is constructed, and based on which, the influence of decoupling capacitors on the electric field at the edge is analyzed. Analytical formulae are derived to design the decoupling capacitors with the lowest cost to achieve the best noise suppression. In addition, the analysis predicts the extremely low radiation at a certain frequency, which can be utilized to suppress the most critical noisy spectrum of the system by choosing the suitable capacitance value of decoupling capacitors. Finally, giving the illustrative examples, the design curves and flow charts are presented to facilitate the designers with the practical reference. Full-wave EM simulation and GTEM Cell measurement are used to validate the accuracy of the proposed analysis and design.

參考文獻


[32] 丁惠玲,Giga赫茲橫向電磁波傳輸室應用在電磁干擾量測之研究,國立台灣大學碩士論文,2008年6月.
[2] G. T. Lei, R. W. Techentin, and B.K. Gilbert, “High-frequency characterization of power/ground-plane structures,” IEEE Trans. Microw. Theory Tech., vol. 47, pp. 562-569, no. 5, May. 1999.
[3] P. Heydari and M. Pedram, “Ground bounce in digital VLSI circuit,” IEEE Trans. VLSI Syst., vol. 11, no. 2, pp. 180-193, Apr. 2003.
[4] J. N. Hwang and T. L. Wu, “Coupling of the ground bounce noise to the signal trace with via transition in partitioned power bus of PCB,” in IEEE Int. Symp. Electromagn. Compat., Minneapolis, MN, USA, vol. 2, pp. 733-736, Aug. 2002.
[5] C. R. Paul, Introduction to Electromagnetic Compatibility,” 2nd ed., Chapter 1, John Wiley & Sons, Inc., 2006.

被引用紀錄


林承宥(2015)。多層印刷電路板走線之電磁輻射快速預測方法〔碩士論文,國立臺灣大學〕。華藝線上圖書館。https://doi.org/10.6342/NTU.2015.01519
黃捷允(2013)。利用集總節點分析電源完整性與去耦合電容最佳化擺置〔碩士論文,國立臺灣大學〕。華藝線上圖書館。https://doi.org/10.6342/NTU.2013.01751

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