具數位控制漣波注入及數位暫態時間最佳化控制之混合型控制降壓轉換器

A Hybrid Controlled Buck Converter with Digitally Controlled Ripple Injection and Digital Time-Optimized Control

許博彥(Bo-Yan Xu)

指導教授 ： 陳景然

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2023年)

https://doi.org/10.6342/NTU202303867

摘要

隨著製程的進步，由於大多數先進製程主要是以提供數位晶片(digital ICs)的前提下進行開發設計的，因此許多電路設計工程師嘗試將電路的功能盡可能地數位化，以利承載著先進製程的好處。因此，本篇論文提出了一個具數位控制漣波注入及數位暫態時間最佳化控制之混合型控制降壓轉換器，所提出的混合型控制器有著漣波控制的基本架構，還有著電壓模式的高頻寬補償迴路設計，所提出的控制操作可以分為三個路徑: (1)數位控制漣波注入的路徑增強了基於漣波控制的穩定性，並感測出有分正負號的輸出電壓與基準電壓的差距("ERROR")給補償器進行導通時間的調變。(2)本架構之慢迴路補償路徑是一個與快迴路相比相對較慢的路徑，負責嚴格調節輸出電壓。此外，有著基於漣波控制架構的特性，關閉時間也會被調整。與其他只能控制上述之一的數位控制器相比，本架構可以更加準確地輸出各種負載條件下須對應到的佔空比，以抑制極限循環震盪的發生。(3)快迴路為數位暫態時間最佳化控制路徑，負責快速的動態響應，以在大迴轉率(Slew Rate)的抽載/卸載下實現最快的暫態響應。
本論文所提出的控制架構與功率級電晶體(PowerMos)採用台積電 0.18-µm CMOS混訊製程(Mixed-Signal Process)實現。量測波形顯示，在輸出電容為2µF，輸出電壓為1.0V以迴轉率1A/1µs變化下進行抽載，本架構之慢迴路補償路徑能在590ns使輸出電壓回穩，暫態的掉落電壓為53.3mV，另一方面在迴轉率為1A/500ns變化下進行卸載，能提供在809ns使輸出電壓回穩，暫態的上升電壓為66.6mV;另外，相比於慢迴路補償路徑，量測波形也顯示了當使用數位暫態時間最佳化控制時，在上述同樣的負載變化環境下，則減少了抽載時所造成的輸出掉落電壓51%，而卸載時減少了輸出突波電壓46.7%，且輸出電壓回穩的時間也皆有相當的改善。

關鍵字

降壓型轉換器 ； 數位控制電壓調節器 ； 基於漣波控制 ； 導通時間調變 ； 假定頻控制 ； 暫態時間最佳化控制 ； 積體電路 ； 可合成邏輯設計

並列摘要

With the progress of the process, because most advanced processes are mainly designed on the premise of providing digital ICs, many circuit design engineers try to digitalize the circuit function as much as possible in order to carry the benefits of advanced processes. Therefore, a hybrid controlled buck converter with digitally controlled ripple injection and digital time-optimized control is proposed in this thesis. The proposed hybrid controller has a basic architecture of ripple-based control and a high-bandwidth compensation loop design in voltage-mode control. The proposed control operation can be divided into three paths. (1) The digitally controlled ripple-injection path enhances the stability of ripple-based control, and sense the signed "ERROR" between the output voltage and the reference voltage to the compensator for on-time adaptation. (2) The slow-loop compensation path is a relatively slow path compared to the fast loop, which is responsible to regulate tightly the output voltage. Besides, with the characteristics of ripple-based controlled architecture, the off-time will also be adjusted. Compared with the other digital controller which can only control one of the above, it can more accurately output the corresponding duty ratio for various load conditions as much as possible to suppress the occurrence of limit cycle oscillations (3) The fast loop is digital time-optimized control (TOC) path, which is responsible for fast dynamic response to achieve the fastest transient response under the large slew-rate load step-up/step-down transient.
The control architecture and PowerMos proposed in this thesis are fabricated by TSMC 0.18-µm CMOS Mixed-Signal Process. The measurement result shows that when the output capacitor is 2µF, the output voltage is specified by 1.0V, and load step-up transient with a slew rate of 1A/1µs, the slow-loop compensation path can stabilize the output voltage within 590ns. The undershoot voltage during the transient state is 53.3mV. On the other hand, when load step-down transient with a slew rate of 1A/500ns, it is capable of stabilizing the output voltage within 809ns. The overshoot voltage during the transient state is 66.6mV. In addition, in the same load variation environment mentioned above, compared with the slow-loop compensation path, the measurement result shows that when using digital time-optimized control, it reduces the undershoot voltage caused by load step-up transient by 51%, and reduces the overshoot voltage caused by load step-down transient by 46.7%. Furthermore, the settling time of the output voltage is also significantly improved in both cases.

並列關鍵字

Buck converter ； digitally controlled voltage regulator ； ripple-based control ； on-time adaptation ； pseudo-constant switching frequency control ； time-optimized control (TOC) ； integrated circuit (IC) ； synthesizable logic design

參考文獻

[1] F. C. Lee, “Power supplies trends – from architecture to building blocks,” presented at National Semiconductor Virtual Laboratories Distinguished Faculty Seminar, 2010. Available at http://www.cpes.vt.edu.

[2] B. Lee, M. K. Song, A. Maity, D. Brian M, “10.7 A 25MHz 4-phase SAW hysteretic DC-DC converter with 1-cycle APC achieving 190ns tsettle to 4A load transient and above 80% efficiency in 96.7% of the power range,” in IEEE ISSCC, Mar. 2017.

[3] C. Song, “Accuracy analysis of constant-on time current-mode dc-dc converters for powering microprocessors,” in Proc. IEEE APEC, 2009, pp. 97-101.

[4] R. Redl and J. Sun, “Ripple-based control of switching regulators – An overview,” IEEE Trans. Power Electron., vol.24, no. 12, pp. 2669-2280, Dec. 2009.

[5] J. Sun, “Characterization and performance comparison of ripple based control for voltage regulators modules,” IEEE Trans. Power Electron., vol.21, no. 2, pp. 346-353, Mar. 2006.