- 學位論文
自動控制射頻積體電路設計與實作
Design and Implementation of RFICs with Automatic Control Mechanism
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摘要
近年來，隨著手機與無線網路的大眾化，射頻系統已成功融入人類生活中。由於市場對於無線產品輕薄短小的需求，促使IC設計工程師紛紛朝高度整合的射頻系統晶片方向前進。在整合的系統晶片中，電路中每個部份皆須考慮製程變異問題。若要真正實現高整合度的系統晶片，RFIC抵抗製程變異的能力必須仔細討論，而最佳的狀況則是RFIC各電路方塊具有自動校準的能力，讓其規格盡量符合原設計者的鏈路規劃，進而確保晶片可以正常工作。 近年來無線通訊技術發展神速，在CMOS射頻系統晶片方面，文獻上已可以找到許多傑出的射頻電路設計，其中大部分的設計皆是開迴路設計，這樣的設計方法，使得電路非常容易受到製程變異的影響，不利於大量製造生產。在許多傳統類比電路例如濾波器設計、鎖相迴路中，閉迴路設計占了絕大部分；許多OP-based電路也是，這些電路往往會使用電阻比例，或是電容比例來設計電路的某些特性，因為電阻間不匹配的誤差往往遠少於製程的變異，製程變異所造成誤差的可能高達20%的誤差。假如適當的使用比例關係來設計電路，可以確保電路特性不會飄移太多，大大降低電路無法運作的機率。 第一個實作利用創新的振幅偵測電路對射頻放大器實現了增益控制技術。在晶片上同時整合振幅偵測電路與差分放大器，測試電路的增益可以藉由閉迴路設計控制。由量測結果可以得知，此架構實現八種不同的增益控制並且其增益解析度為1dB。 第二個實作實現了可程式化的射頻放大器。射頻放大器的增益可以利用循序漸進式演算法來控制，其控制電路包含振幅偵測電路、比較器、循序漸進演算法控制器與數位類比轉換器。此架構實現了八種不同的增益控制並且其增益解析度為1dB。根據量測結果，其增益誤差皆小於0.5dB。 第三個實作實現了操作在3-GHz並且內建自動控制機制的相移器。利用循序漸進延遲鎖定迴路的操作，相移器的相位差距可被精準地控制。在此實作中，我們實現了八種不同的相位差距控制並且其解析度為22.5°。根據模擬的結果，其相位誤差皆小於2°。
並列摘要
In recent years, with the popularization of mobile phones and wireless network, the RF system has been successfully integrated into human life. The market demand for compact wireless products pushes IC designers to move forward to highly integrated RF system chips. However, with the increasing complexity in the circuit design, process variation problem in every part of the circuits should be considered carefully. The best situation would be every circuit block of RFIC to have the automatic calibration ability, making its specification fit the original designers’ circuit plan and then confirm the chips work properly. With wireless communication developing rapidly, many outstanding RFIC designs have been found in many references in the field of CMOS system chips, most of which are open-loop design. This kind of design manual makes circuits affected by process variation very easily, which is unfavorable to produce numerously. Therefore, designers should make CMOS RF system able to really apply on many traditional analog circuits. For example, closed-loop design occupies in the most of LPF and PLL architecture, so are many op-based circuits. Designers usually use resistor or capacitor ratios to propose some characteristics of the circuits. Because the error of mismatch between resistors is much lower than process variation, which may get up to 20%. With proper use of ratio relation for circuit implementation, designers can ensure that performance of circuits will not flow too much, highly degrading the probability for circuits to be out of work. In chapter 3, a gain control technique with a novel amplitude detector for RF amplifiers is presented. By monolithically integrating the amplitude detectors and the differential difference amplifier, the voltage gain of the device under test (DUT) can be controlled by using closed-loop design. Based on the measurement results, there are 8 gain modes with 1-dB resolution in this proposed architecture. In chapter 4, a programmable-gain RF amplifier is presented. With SAR algorithm, the gain of RF amplifier can be precisely controlled. The control circuit contains amplitude detectors, a comparator, a SAR controller and a DAC. There are 8 gain modes with 1-dB resolution in this proposed architecture. Depend on the measurement results, gain errors in every gain mode are less than 0.5dB. In chapter 5, a 3-GHz phase shifter with automatic control mechanism is presented. With SAR DLL operation, the phase difference of phase shifter can be precisely controlled. There are 8 phase difference modes with 22.5° resolution in this proposed architecture. Depend on the simulation results, phase difference errors in every mode are less than 2°
參考文獻
[1] B. Razavi, Design of Analog CMOS Integrated Circuits, New York: McGraw-Hill, 2001.
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