- 學位論文
高速串列解串系統訊號抖動容忍度的快速預測
A Fast Estimation for Jitter Tolerance in High-Speed SerDes Systems
摘要
對於一個高速串列解串系統，通常會用訊號抖動容忍度測試來評估接收電路的性能，它是在測試訊號中加入正弦抖動、符碼間干擾抖動以及隨機抖動來測試接收電路在極端條件下的誤碼率。然而，訊號抖動容忍度測試的儀器非常昂貴，模擬也因為需要逐位元分析而極為耗時。過去有研究提出一些適用於接收電路中時鐘數據恢復電路的抖動容忍度預測方法，但這些方法都因為沒有考慮訊號通道頻寬限制所造成的符碼間干擾抖動，而無法被應用於實際的串列解串系統。 此篇論文擴展了過去的逐位元分析預測法，透過整合進一個時域的符碼間干擾抖動模型及改進時鐘數據恢復電路的相位行為模型，來突破過去方法無法使用於串列解串系統的限制，並藉助兩個運算上的加速技巧，所提出的預測方法在速度上可以比模擬快90,000倍，同時仍保持很低的誤差。接著，此篇論文再提出一個可以進一步降低耗時的外插技巧，他是基於計算錯誤位元數的期望值，以利用較少的位元分析數量來預測更低誤碼率要求下的抖動容忍度，使用這項外插技巧的預測可以比原先的完整位元分析預測再快4,000倍，其預測結果只有百分之六的偏差，透過所提出的預測方法，九個不同正弦抖動頻率在1E-10誤碼率要求下的抖動容忍度可以在七秒鐘內被預測，所需時間比量測快120倍。 此篇論文也將提出的方法應用在實際的USB訊號抖動容忍度測試量測實驗，藉由合成出的等效時鐘數據恢復電路來作訊號抖動容忍度預測，並與量測結果作比較。有部分預測準確性欠佳，在論文最後有討論可能的誤差原因及實驗中的不確定因素，並提出對未來實驗的建議。
並列摘要
For high-speed Serializer/Deserializer (SerDes) systems, the jitter tolerance (JTOL) test is a common evaluation tool for the receiver, which includes sinusoidal jitter (SJ), intersymbol interference (ISI) jitter, and random jitter in the bit-error-rate (BER) test. However, measuring or simulating the JTOL is costly and time-consuming. The previous JTOL estimation techniques are restricted for the pure clock and data recovery (CDR) circuits in the receiver without lossy channels, which is impractical for SerDes systems. This thesis extends the previous bit-by-bit estimation by integrating it with a time-domain ISI jitter model and improving the CDR phase behavior model. Two acceleration techniques are also proposed. The proposed estimation is 90,000 times faster than the simulation with great accuracy. Then, an extrapolation technique is proposed to reduce the processing time further, which estimates the JTOL at ultra-low BER requirements with fewer analysis bits and is based on the expected value of the error bit numbers. The proposed extrapolated estimation is further 4,000 times faster than the original full-bit estimation with only a 6 % deviation. A JTOL result at 1E-10 BER with nine considered SJ frequencies can be estimated in 7 seconds with the proposed estimation method, which is 120 times faster than the measurement. This thesis also applies the proposed method in a practical USB JTOL test. The measurement result is compared to the estimated JTOL of a synthesized equivalent CDR. Since the partial estimated result is inaccurate, the possible causes of the errors are discussed. Lastly, some suggestions for future experiment are also provided.