- 學位論文
毫米波線性化可變增益放大器及變壓器多疊接低雜訊放大器之研究
Design and Analysis of Millimeter-wave Variable Gain Amplifiers with Built-in Linearizer and Transformer Cascode Low Noise Amplifiers
摘要
本論文第一主題為探討毫米波可變增益放大器與低雜訊放大器之設計與實 現。其一主題在於利用先進的半導體製程,設計出特性良好的毫米波可變增益放 大器,並且此可變增益放大器也具有線性化之功能。此架構是基於可變增益機制 中的電流驅動方法來作改良,並且加入降低雜訊級間電感來使此可變增益放大器 不僅可在毫米波頻段提供高增益、較大的可調增益範圍、並且具有線性化的機制, 實現在台積電九十奈米金氧半場效電晶體製程上。相較於傳統可變增益放大器, 此架構具有最大的可調範圍,在高增益模式下具有較低的雜訊同時也具有良好的 線性度,為世界第一個完成於毫米波的射頻可變增益線性化放大器。 本論文第二主題為變壓器多疊接式放大架構之分析。多疊接組態有面積小、 高增益之特性,因此在低頻曾被採用來設計功率放大器;但由於多疊接組態在高 頻會因為級間寄生電容而產生額外的雜訊,因此至今在低雜訊放大器上之應用僅 廣泛採用雙電晶體疊接架構。在此,本論文提出另一雜訊抑制機制,選擇更小尺 寸電晶體當放大單元以降低功耗,並於多疊接元件間加入變壓器來抑制雜訊、提 高高頻穩定度並且增加操作頻寬及縮小面積,同時結合多疊接架構高增益的優 點,應用於毫米波低雜訊放大器設計;此外,我們使用了台積電九十奈米製程實 現一 Q 頻段四疊接及一 V 頻段三疊接低雜訊放大器做為驗證,此二電路相較於傳 統低雜訊放大器,具有更低功耗、低雜訊、高增益、大頻寬且小面積之特性。此 Q 頻段電路同時為首先完成於毫米波頻段之四疊接組態低雜訊放大器。本論文也研 究了低供應電壓多疊接組態放大器分析。變壓器多疊接組態雖然具有許多好處, 然而其高供應電壓一直是此組態無法在 通訊系統中被採用的原因之一。為了能使疊接組態能夠被應用於實際的通訊系統當中,在此我們提出了一降低電壓的技 術—磁耦合技術。除了降低供應電壓之外,多疊接組態之雜訊指數也可進一步被 降低。以此技術為基礎,我們使用了台積電九十奈米製程實現一 Q 頻段疊接、一 V 頻段疊接及一 V 頻段三疊接低雜訊放大器做為驗證,此二電路相較於傳統低雜 訊放大器,具有更低供應電壓、低雜訊、高增益、大頻寬且高線性度之特性。由 於供應電壓已大幅降低,此多疊接組態可應用於實際的通訊系統中。
關鍵字
低雜訊放大器並列摘要
In this dissertation, the designs and analysis of millimeter-wave (MMW) variable gain amplifier (VGA) in millimeter-wave (MMW) regime, MMW transformer multi-cascode low noise amplifiers (LNAs) and low voltage cascode LNAs with magnetic coupled technique are investigated. One goal of the dissertation is to design and implement the MMW VGA with impressive performance in modern compound semiconductor process. Based on current steering technique and noise reduction technique, the VGA has a wide gain control range and low noise figure at the high gain state at MMW frequencies in TSMC complementary metal-oxide-semiconductor (CMOS) 90nm technology. Compared with conventional designs, this work presents better RF performance than the previous reported V-band VGAs. At the same time, it overcomes the linearity design bottleneck of VGAs to operate at V-band frequency, and is the first RF VGA with the built-in linearizers in MMW regime. The transformer multi-cascode amplified structure and the low voltage multi-cascode structure are also described and analyzed in the dissertation. The multi-cascode structure has the advantages of miniature size and high gain. However, since the multi-cascode structure will contribute excess noise at high frequency. Consequently, a low power transformer multi-cascode structure, which incorporates with the high gain characteristic is proposed and employed to the design of millimeter-wave LNAs. For demonstration, a Q-band LNA in CMOS 90 nm process with transformer quadruple-cascode structure and a V-band LNA in 90 nm technology with transformer triple-cascode device are fabricated. The two LNAs feature lower power consumption, better noise figure, higher gain, wider band performance and more compact size than the conventional LNAs. To the best of our knowledge, the Q-band LNA is the first quadruple-cascode LNA implemented in MMW frequency. In order to improve the high supply voltage issue in multi-cascode structure, the magnetic coupled technique is proposed. With this technique, the supply voltage and the noise figure are further reduced. Thus, the multi-cascode topology can be applied to implement CMOS LNAs for low voltage system applications. For demonstration, a Q-band LNA and two V-band LNAs with this technique are designed and fabricated by using 90nm CMOS technology. These three LNAs feature higher gain, lower noise figure, much lower supply voltage and better linearity than the conventional multi-cascode LNAs and the conventional LNAs.