- 學位論文
利用摻雜及異質結構提高基於二維材料的場效應管的電特性
Enhanced Performance of Two-dimensional Materials Based Field-effect Transistors via doping and Van der Waals Heterostructures
摘要
隨着矽基晶體管越來越接近物理極限，製造工藝的要求也越來越高。然而，光刻技術改進已不足以實現元件尺寸的進一步縮小，尤其是在邏輯電路設計。更糟糕的是，集體管在尺寸上的減小會導致漏電流等缺點。於是全球的科學團隊相繼提出了應變硅、高介電係數、SOI(絕緣層上覆矽)和多柵晶體管等革新CMOS技術以幫助緩解尺寸縮小帶來的問題。然而，長遠來看，這些方法並不能阻止集體管面臨物理極限的問題。因此，發展新型材料例如二維材料來彌補矽基的缺陷是目前研究的重要方向之一。石墨烯和二硫化鉬是二維材料中最具代表性的半金屬和半導體材料。 由於石墨烯是零帶隙材料，對外在環境影響非常敏感，非常適合應用於各種偵測元件，如何控制摻雜的類型和強度就成為關鍵問題。本研究中，我們將一些常見的胺官能基分子，如鄰苯二胺(OPD)、二乙三胺(DETA)和四乙五胺(TEPA)以及羥官能基分子包括苯酚、鄰苯二酚和四甘醇利用氣相吸附的方法摻雜石墨烯。我們驗證了不同分子的種類、不同分子的結構與摻雜後對費米能階變化的相關性。實驗中發現，石墨烯表面所吸附的分子，會通過載子交換的方式摻雜石墨烯，其中推電子基的氨基分子屬於n型摻雜，搶電子基的羥基屬於p型摻雜，並可觀察到費米能階與分子官能基的數量呈正相關的變化。此外，我們發現摻雜劑分子的空間結構是影響摻雜程度和遷移率的另一個決定性因素。帶有芳香環的摻雜分子更傾向於平行分佈在石墨烯的表面，且其中的π-π鍵增強了分子與石墨烯表面的相互作用，從而產生更強的摻雜效應。載流子遷移率主要受到兩個因素的影響，由於摻雜會引入新的散射源，所以庫倫散射會使遷移率降低，而補償機制又會使遷移率提高，所以載流子遷移率的變化是補償機制與庫倫散射相互競爭的結果，因此鏈狀結構的分子 (二乙三胺和四甘醇) 提供電荷中和帶電雜質中心,從而使石墨烯的電子遷移率從3068 cm2 V-1 s-1 提升至 9700 cm2 V-1 s-1，電洞遷移率從3161 cm2 V-1 s-1提升至3650 cm2 V-1 s-1。 本文還提出了一種新型的凡德華異質結構場效應晶體管。首先，我們進行二硫化鎢/二硫化鉬與二硫化鉬/二硫化鎢兩種異質結構的光致發光光譜分析，從兩者的光學性質探討異質介面的電荷轉移機制。我們發現其二硫化鉬/二硫化鎢場效電晶體對於電特性的改善效果有限，然而倒置異質結構堆疊次序的二硫化鎢/二硫化鉬電晶體，則相較於純二硫化鉬電晶體大幅提升了汲極電流（約兩倍）與場效載子遷移率（從43.3 cm2 V-1 s-1 至 62.4 cm2 V-1 s-1）。此外，本研究也透過光致發光分析、Y函數法（Y-function method）、遲滯分析與變溫電性量測來驗證其電性顯著的提升機制來自於電荷轉移機制與通道凡德華自主封裝導致的肖特基能障下降（從120 至 52 meV）。最後，我們製作了二硫化鎢/二硫化鉬/二硫化鎢雙重異質結構場效電晶體，藉由兩個異質結構的結合，使場效載子遷移率在室溫下顯著提升至102.5 cm2 V-1 s-1外，在30 K的溫度下甚至可達169.7 cm2 V-1 s-1，該現象說明庫倫散射在低溫環境下會被進一步抑制，從而使雙重異質結構電晶體的電特性得以進一步增強。
並列摘要
As the silicon-based transistor is approaching the physical limit of matter, the requirement for the manufacturing process becomes higher. Indeed, improving the Photolithography technic is no longer sufficient for scaling, especially for logic circuit design. Even worse, scaling can actually induce drawbacks like current leakage. A variety of advanced CMOS technologies, such as strained silicon, high-k, Silicon on insulator (SOI), and multigate transistors, are proposed successively to help mitigate the scaling issues. However, these methods will not be able to prevent scaling from facing the physical limits. In this regard, beyond silicon concepts based on two-dimensional (2D) materials are promising alternatives. Graphene and Molybdenum Disulfide (MoS2) are the most representative semi-metal and semiconductor materials of 2D material. Here, we demonstrate a molecular doping method by physical vapor molecule adsorption using several functional group compounds. These compounds include the amine groups (o-phenylene diamine (OPD), diethylenetriamine (DETA), and tetraethylenepentamine (TEPA)) and the hydroxyl groups (phenol, catechol, and tetraglycol). We confirmed the positive correlation between the doping level and the number of functional groups in this study and found that the spatial structure of dopant molecule is another determinant factor affecting the doping degree and mobility. Thus, the dopants with an aromatic ring can be easily rearranged to maximize the interaction with graphene since the planar structure and π-π interaction between graphene and aromatic ring, resulting in a stronger p-doping effect. The work function of graphene is efficiently tuned from 4.3 eV to 3.83 eV for TEPA-doped graphene and from 4.3 eV to 4.73 eV for catechol-doped graphene. Molecules with alkyl chains (DETA and tetraglycol) act as compensators that partially neutralize the randomly charged impurity centers in the substrate, increasing the graphene electron mobility from 3068 cm2 V-1 s-1 to 9700 cm2 V-1 s-1 and the hole mobility from 3161 cm2 V-1 s-1 to 3650 cm2 V-1 s-1 compared with the pristine graphene. We also demonstrated a novel van der Waals (vdW) heterostructure field-effect transistor (FET) using vdW stacking as next-generation device architecture. The MoS2/WS2 heterostructure FET exhibits a large improvement in the drain current and field-effect mobility (from 43.3 cm2 V-1 s-1 to 62.4 cm2 V-1 s-1) compared with a single MoS2 FET. Such significant enhancement is mainly due to the charge transfer effect. The vdW self-encapsulation effect in the device channel also helps to reduce the Schottky barrier height (SBH) from 120 to 52 meV at the contact interface. Finally, the WS2/MoS2/WS2 double-heterostructure FETs further boost the mobility up to 102.5 cm2 V-1 s-1 at room temperature (25 °C) and 169.7 cm2 V-1 s-1 at 30 K. The much higher mobility exhibited at the lower temperature indicates the suppression of Coulomb scattering, resulting in the enhanced electrical performance of the double-heterostructure FETs.