- 學位論文
考慮光學微影效應之增進寄生參數準確度抽取方法
A New Method to Improve Accuracy of Parasitics Extraction Considering Sub-wavelength Lithography Effects
摘要
精確的參數萃取工具 (LPE tools) 對實際模擬電路的響應已經變得非常重要了。在現代的奈米積體電路中，原始的佈局在被製造時，會因為受到次波長微影的影響，而產生顯著的扭曲變化。全晶片的參數萃取工具(Full-chip-LPE tools)面臨了一個挑戰，對於存在的參數萃取方法，面對轉角圓化的問題無法被精確地特徵化，因此佈局裡的多邊形圖形則會被近似成直角的圖形。 在這篇論文中，轉角圓化在參數萃取中的影響將會被探討。一個新的參數萃取方法稱為圖形近似 (Shape Approximation) 方法，也是所謂的圖形近似參數萃取 (SA-LPE) 方法，將被提出來說明轉角圓化的影響。SA-LPE這個方法會被用一個三維空間的field solver來驗證其可行性，並顯現出SA-LPE可以大大的降低誤差至2%以內。SA-LPE可以更容易地應用在真實的矽資料校對。
並列摘要
Accurate layout parasitic extraction (LPE) has become significant for simulating actual circuit responses. Modern nanometer integrated circuits are commonly fabricated by sub-wavelength lithography with significant shape deviations from drawn layouts. Full-chip LPE imposes a challenge because corner rounding cannot be accurately characterized by the existing LPE methods in which polygons of the layout are approximate to be Manhattan. In this thesis, the impact of corner rounding on LPE is studied. A new LPE method incorporating shape approximation (SA) algorithms, the so-called SA-LPE methodology, is proposed to account for the effects of corner rounding. The effectiveness of the SA-LPE methodology is examined by a three-dimensional (3-D) field solver, showing that the accuracy of the SA-LPE methodology can be significantly improved with less than 2% prediction error. The SA-LPE methodology is readily applicable to calibration with real silicon data.