軟體自我測試(Software-Based Self-Test)由於具有在線測試和功能性測試的特性,使得其在近幾年引起了研究人員的注意。在本論文中,我們提出了一種有效的將全掃描鏈測試圖樣轉換為測試程式之轉換方法,以幫助生成可偵測老化引起的延遲故障的高質量測試程序。該方法利用指令序列來實現自動測試圖樣產生器(Automatic Test Pattern Generation)所產生的故障檢測狀態,因此可以在處理器的操作模式下執行延遲故障測試。此外,我們提出了一個基於管道設計且適用於所有模組的測試程序樣板。同時,我們也使用基於指令集架構(Instruction Set Architecture, ISA)產生的ATPG約束,有助於提高將測試圖樣轉換為指令時的成功率,並使故障檢測狀態更易於實現。 通過這種方法,我們可以獲得測試程序,這些程序可以在最先進的晶片中快速檢測出老化引起的時序違規,而無需額外的硬體花費,並且讓攸關生命安全的汽車與醫療電子系統在正常操作模式下便能進行延遲故障自我測試。
Software-based self-test (SBST) has drawn researchers’ attention in recent years due to its capability of enabling on-line testing in functional mode. In this thesis, we proposed an efficient pattern-to-program conversion methodology to generate high-quality test programs for aging-induced delay faults. This methodology utilizes instruction sequences to realize fault detection state generated by automatic test pattern generation (ATPG). Therefore, delay fault test can be executed in operating mode of a processor. Additionally, a module-independent template based on pipeline design is proposed and ISA-based ATPG constraints are utilized to improve the pattern-to-program conversion efficiency. With the proposed methodology, test programs that can detect the aging-induced timing violations in state-of-the-art chips can be executed without additional hardware overhead in the functional mode for life-critical, medical and automotive electronics.