- 學位論文
接地彈跳雜訊在多層板電路間的耦合及其分析與仰制
Analysis and Suppression on Ground Bounce Noise Coupling between Multi-Cavities for Multilayer PCBs
摘要
本論文主要探討在現今高整合、高複雜度的電路設計當中，需要不同直流位準提供相關電路使用，使得多層板電路中的動力/接地平面，必需施以切割狹縫來劃分不同直流位準的動力/接地平面，然而在高速數位電路因電流快速切換而產生接地彈跳雜訊，此雜訊不僅在其動力/接地平面傳播，更因切割狹縫產生不同的耦合路徑，耦合至上下層鄰近的動力/接地平面，使電路的功率完整性受到影響。本論文對此雜訊耦合問題提供簡易的近似模型，並提出抑制方法期望達到”虛擬屛蔽”的作用，使雜訊耦合得以降低，並從模擬以及實驗結果，證明本論文所提出之抑制方法可有效降低雜訊的耦合，間接證明所提出之近似模型的正確性。 現今直流電源網路的電磁相容設計中，為了阻隔接地彈跳雜訊的傳播，常以切割狹縫方式破壞雜訊的傳播路徑，此方法在單一動力/接地平面可有效達到隔離雜訊的效果，但在動輒數層動力/接地平面的多層板電路中，導致接地彈跳雜訊經由切割狹縫在多層結構中反覆耦合，進而產生諧振模態使雜訊惡化的現象，造成切割狹縫喪失阻隔雜訊的功能，本論文稱之為”覆蓋效應(Cover effect)”。此效應在過去電源完整性設計中，較少被重視及廣泛探討，本論文將從模擬及實驗結果證明問題的嚴重性，也提出因應的改善方法，有效防止覆蓋效應的雜訊發生。
並列摘要
This thesis presented that in today’s high-integrative and high-complex circuit designs result in different DC-level to provide relative circuits. In this way, slots are taken to discriminate different DC-level in the multi-layer power/ground. However, because of the rapid switching current, the Ground Bounce Noise appears in high speed digital circuits. The Ground Bounce Noise not only transmits in its own power/ground plane, but also coupling to neighboring power/ground plane through slots. Therefore, the power integrity of circuits is affected. This thesis provides a simple approximation model to this ground bounce noise coupling between cavities and proposes the suppression method to reach “virtual shield” which can reduce noise coupling. From the simulation and the experiment, the suppression method has been proven to be able to decrease noise coupling efficiently and the correction of the approximation model has been also proven indirectly. In today’s EMC designs of power network distribution, slots are often used to destroy the propagation path to isolate the ground bounce noise transmission. This method is able to isolate noise efficiently in single power/ground plane. However, in the multi-layer power/ground plane circuits, the ground bounce noise will couple repetitively through slots in multi structure; and then the resonance mode will be produced to make the noise couple back. In this way, the slots lose the performance to isolate the noise; we called “Cover effect” in this paper. This effect is less investigated and discussed broadly in the past power integrity designs. This thesis is going to prove the seriousness of this problem from the simulation and experiments, and is going to provide improvement methods to prevent efficiently the cover effect from appearing.