具並聯式功率結合器之多模功率放大器

A Multi-Mode Power Amplifier Using Parallel Power Combining Structure

黃仕昕(Shih-Sin Huang)

指導教授 ： 毛紹綱

國立臺北科技大學/電資學院/電腦與通訊研究所/碩士(2012年)

摘要

本論文提出應用於1.9 GHz之多模功率放大器，並利用並聯式功率結合變壓器提升輸出功率。電路架構採用兩級串接型式放大電路，分別為驅動級與功率級，兩級皆採用疊接差動電路架構，以改善CMOS電晶體崩潰電壓過低之問題。折衷於線性度和效率，驅動級與功率級的偏壓點皆操作在AB類。本多模功率放大器提供三種運作模式，分別為高功率模式(high-power mode; HPM)、中等功率模式(medium-power mode; MPM)、低功率模式(low-power mode; LPM)，切換方式藉由切換功率單元(power cell)的數目，不需要額外的開關電路，可節省更多的晶片面積及成本。偏壓電路採用調節式偏壓電路，減少功率放大器之AM-AM失真以獲得線性度的改善。量測的小訊號增益在三個模態下分別為 20.9 dB、10.7 dB和6.35dB，在1-dB增益壓縮點下的輸出功率分別為 21.8 dBm 、14.4 dBm和 8.3 dBm。

關鍵字

金氧半場效電晶體功率放大器 ； 功率結合變壓器 ； 並聯式功率結合器 ； 多模功率放大器

並列摘要

This thesis proposed a 1.9 GHz multi-mode power amplifier using power combining transformer to increase output power. The power amplifier with parallel power combining transformer is designed by the driver and power stage in cascade configurations. To enhance breakdown voltage of CMOS transistor, the cascode configuration is used for driver and power stage, and where the class-AB biased point is chosen to compromise efficiency and linearity. Three operation modes, high-power, medium-power, and low-power modes, can be switching by changing the power-cell number, and this method can save the chip size and cost since no switch circuit is required. To enhance the linearity, the adaptive bias circuit is used for biasing power amplifier. For high-power, medium-power, and low-power modes, the measured small-signal gains are 20.9 dB, 10.7 dB, 6.3 dB, and the measured output 1-dB compressed powers are 21.8 dBm, 14.4 dBm, and 8.3 dBm, respectively.

並列關鍵字

CMOS Power Amplifier ； Power Combining Transformer ； Power Combining Structure ； Multi-Mode Power Amplifier

參考文獻

[1]N. O. Sokal and A. D. Sokal, “Class E-A new class of high-efficiency tuned single-ended switching power amplifier,” IEEE J. Solid-State Circuit, Vol. 10, no. 3, pp.168-176, Jun. 1975.

[2]K. H. An, O. Lee, H. Kim, D. H. Lee, J. Han, K. S. Yang, et al., “Power-combining transformer techniques for fully-integrated CMOS power amplifiers,” IEEE J. Solid-State Circuit, vol. 43, no. 5, pp.1064-1075, May 2008.

[3]C. Park, D. H. Lee, J. Han, and S. Hong, “Tournament-shaped magnetically coupled power-combiner architecture for RF CMOS power amplifier,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 10, pp. 2034-2042, Oct. 2007.

[4]G. Hau and A. Hussain, “Multi-mode power amplifier with high efficiency under backoff operation,” U.S. Patent, no. 11/841,162, 2009.

[6]J. Huang, Y. Liao, and Z. Chen, “A dual mode GaAs HBT power amplifier for LTE Applications,” in IEEE Solid-State and Integrated Circuit Technology, 1-4 Nov.2010, pp. 722-724.