- 學位論文
512至2048位元可變長度之RSA加解密系統之設計與研製
The Design and Implementation of a 512~2048 bit Scalable RSA Encryption/Decryption System
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摘要
本文中我們研製了一個512位元到2048位元可變長度的RSA公開金匙加解密器；我們使用了H演算法將RSA系統的的指數與模運算(Y=ME mod N)轉換成一連串的蒙哥馬利運算；在此我們可以用16位元的蒙哥馬利模組組合出任何位元的蒙哥馬利單元，而每個模組間採用了高度的管線化設計，使得執行一次n位元的蒙哥馬利運算的時間複雜度為O(n)。而控制單元共有256位元、512位元、1024位元、和2048位元四種操作模式，配合同位元數之模組化蒙哥馬利單元即可成為一個完整的RSA加解密器。 此系統的系統時脈為25MHz，從Altera CPLD 6K系列上的模擬結果得知，每完成一個n位元的RSA加密或是解密運算花費大約3*n2時脈週期，如果以512位元來計算，則需要3*5122個時脈週期來完成一次的加密或是解密運算。
並列摘要
In this thesis we design a 512-bit to 2048-bit scalable RSA public key encryption/decryption system. The H algorithm is used to translate the modular exponentiation in a RSA cryptosystem into a sequence of Montgomery’s operations. And we can combine several 16-bit Montgomery’s modules into a complete Montgomery’s unit which can achieve n-bit Montgomery’s operation, where n can be any bit number of keys. The Montgomery’s Unit is designed in a fully pipelined architecture. Its complexity of time is O(n). And the Control Unit is designed in 256-bit, 512-bit, 1024-bit, and 2048-bit modes. It’s a complete RSA cryptosystem when the Control Unit is combined with a modularized Montgomery’s Unit with suitable bit length. The system clock is set to 25MHz. From the simulation result of Altera CPLD 6K series, it takes about 3*n2 clocks to finish an operation of a n-bit RSA encryption or decryption. For example, each encryption or decryption will take about 3*5122 clocks to calculate in a 512-bit RSA cryptosystem.
參考文獻
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