本篇論文利用商用之標準阻抗基板(Impedance Standard Substrate, ISS)執行LRM、LRRM校正使量測參考平面至探針尖端,再使用自行設計之校正件,計算出其傳輸線之特性阻抗,藉由特性阻抗轉換,用逆運算方式進行去嵌化(De-embedding),求出待測物實際的真正特性。設計的L-OS-OT校正件為LST校正方法的延伸,可以用自我校正的方式直接求出各校正件未知參數,應用於TSMC 0.18um CMOS晶圓毫米波元件之特性量測,量測數據將與TRL(Thru Reflect Line)的校正結果作比較,由此驗證L-OS-OT校正方法在CMOS元件量測的正確性與實用性。
In this thesis, the commercial impedance standard substrate is firstly adapted to calibrate the system errors to the probe tips using LRM or LRRM techniques. Then the proposed calibration method is applied to evaluate the error terms for de-embedding purpose, thereby the actual characteristics of the device-under-test is acquired.The L-OS-OTcalibration techniqueis a generalization of the LST calibration method whereparasitic elementsofthe series/shunt resistors can be solved directly instead of the lossyTL model used in LST calibration. This feature is important for CMOS devices due to extra parasitic effects for poly resistors which do not satisfy the simple lossy TL model. Measurement datafor a NMOS FET are demonstrated with comparison of TRL calibration results toshow validity of the L-OS-OT calibrationmethod.