- 學位論文
支援數位訊號處理器之微核心設計與雙核心開發環境
Microkernel Design and Dual-core Supports for PAC VLIW DSP Processors
摘要
近來高效能低耗能的的VLIW DSP處理器近來被逐漸的使用在嵌入式系統來處理影音多媒題應用程式。同時，結合MPU跟DSP雙核心處理器也被廣泛的使用在嵌入式系統中。然而可能有的應用程式太多變且複雜了，使得在這樣雙核心的系統下如何提供一個資源管理和核心溝通管理，成為一個重要的課題。 在資源管理上我們需要一個作業系統來栛助我們工作，然而不像MPU可以使用一些常見的作業系統，DSP因為架構特殊，所以設計一客製化的微核心是比較好的。此外，在雙核心的系統下，我們還需要提供友善且高效能的構通機制來栛助程式設計師來開發程式。 在本篇論文中，我們著重在PAC VLIW DSP的微核心的設計。我們說明了pCore，也就是PAC VLIW DSP上的微核心的排程設計、行程切換、行程構通、同步等等。此外我們還設計出幾個雙核心的溝通模型。並用這些模型來設計出雙核心的應用程式。最後我們在實驗中展示了pCore的各項效能，還有我們雙核心的應用程式的效能比較。
並列摘要
High-performance and low-power VLIW DSP processors are increasingly deployed in embedded mobile devices to process video and multimedia applications. Also, dual-core embedded processors which combine a MPU and a DSP are widely used in embedded systems to provide powerful computation. As there are diversified applications concurrently used for such systems, resource and communication management for dual-core embedded system become a focus of recent research efforts. To manage resource, we need operating systems for both processors. And there are many popular operating systems for MPU. However, because of special architecture, DSP needs specific operating system to help it manage resource. Besides, the dualcore embedded system needs friendly and efficient communication mechanize to help programmers develop dual-core applications easily. In this thesis, we address the microkernel design issue for a VLIW DSP processor, known as PAC architectures. We describe the detailed design of scheduler, context switch, inter-process communication, and synchronization of our microkernel system. This is known as pCore. In addition, we propose several dual-core communication model for PAC DSP and ARM based on pCore and Linux. These mechanizes can help programmers develop dual-core applications. Also, we show several dual-core JPEG encoders based on the dual-core communication models. Our experiments give the performance of pCore. It also shows the performance speedup of dual-core JPEG encoder. This is the first known implementation for dual-core systems native developed in Taiwan.