電漿增強型化學氣相沉積製程下具低介電常數氟矽玻璃銅導線之研究

Study To The Integration Of Copper With Low-K Fluorosilicate Glass In Plasma-Enhanced Chemical Vapor Deposition For 90 nm Technology

李鎧安(Kai-An Lee)

指導教授 ： 吳燦明

中原大學/工學院/電機工程研究所/碩士(2011年)

https://doi.org/10.6840/cycu201100203

摘要

先進製程與產品良率通常是IC製造的指標，而近幾年來因受限於物理極限與材料影響使得IC在生產技術上面臨瓶頸，而本研究將使用化學氣相沉積法透過薄膜沉積原理並搭配低介電材料FSG進而增加良率與降低RC-Delay時間，通常使用介電材料可使用HDP-CVD與PECVD兩種而使用PECVD沉積法是因為它具備了以下幾種優點：
1.良好的階梯覆蓋率(Step Converage)。
2.可將製成溫度控制在400以內,屬於低溫製程。
3.有較高的沉積率。
4.生產參數易於控制
5.產能效率快。
6.良好的Gap Fill能力。
較常見的低介電材料主要有：二氧化矽(Silicon)、含氫矽酸鹽類(Hydrogen silsesquioxane)、含氟二氧化矽(Fluorinated silicate glass)、含碳二氧化矽(Organosilicate glass)。使用含氟二氧化矽因為它具備較好的Gap Fill能力，與熱穩定較佳，根據FSG薄膜的特性必須調整後段CMP製程使其可達到平坦化的目的，而根據實驗對會影響FSG的參數也要有最佳的改善方法與對策，本實驗主要是研究在使用OX，SIN搭配低介電材料FSG(Fluorinated Silicate Glass)並應用銅導線製程透過PECVD沉積原理在配合CMP製程以達到製程平坦最佳化的目的。

關鍵字

電漿增強型 ； 氟矽玻璃

並列摘要

Advanced process and product yields are usually indicators of IC manufacturing, but in recent years due to the limited impact of the physical limits of the material makes the IC bottlenecks faced in the production technology, and this research will use chemical vapor deposition, and through the principle of thin film deposition with FSG low dielectric material thereby increasing yields and reducing RC-Delay time, usually dielectric material can be used HDP-CVD and PECVD two, and using the PECVD deposition because it has the following advantages:

1. A good step coverage (Step Converage)。
2. Can be made within the temperature controlled at 400, belonging to low-temperature
process。
3. Have a higher deposition rate。
4. Easy to control the production parameters 。
5. Production efficiency and fast。
6. Good Gap Fill capacity。
The more common low-k materials are: silica (Silicon), hydrogen silicate (Hydrogen silsesquioxane), fluorinated silicon dioxide (Fluorinated silicate glass)，carbon dioxide (Organosilicate glass)。 The use of fluoride silica because of its ability to have better Gap Fill， and better thermal stability， according to the characteristics of FSG films back-to adjust the process so that it can be achieved CMP planarization purposes， and FSG will affect the experimental parameters on must also have the best improvement methods and measures，this experiment is to study the use of OX，SIN with a low dielectric material FSG (Fluorinated Silicate Glass) and the application of copper wire manufacturing process through the PECVD deposition of the principle in line with the CMP process to achieve the process smooth the Best of the goal。

並列關鍵字

PECVD ； FSG

參考文獻

[3]鄭建星：Thermal Reactions Between Sputtered Copper Thin Film And Low Dielectric Constant Materials，June2003，PP9~17，PP25~28。

[1]Novellus Concept One/Concept Two Dielectric PECVD Process Guide Process Volume2，12 Dec 97，PP3-7~3-33，5-7~5-26。

[2]王建榮，林必兆，林慶福，半導體平坦化ＣＭＰ技術，全華科技圖書，June1999，PP1-12~1-13。

[4]楊正杰，張鼎張，鄭晃忠，“銅金屬與低介電常數材料與製程”，毫微米通訊，第七卷第四期，PP40~44。

[5]莊達人，VLSI 製造技術，高立圖書，2005。