- 學位論文
覆晶封裝材底膠材料對翹曲之改善
Warpage Improvement of Underfill Materials for Flip-chip Packaging
摘要
隨著現今電子產品發展趨勢朝向更輕、更薄、更短、更小化，如攜帶型通訊設備、筆記型電腦、掌上顯示器、攜帶型醫學儀器、航太及國防科技等IC產品。因此IC元件發展也隨之趨向首當其衝要小型化，並滿足高功率、高密度、高效能等需求。因此在IC封裝也面臨相當的挑戰，其中覆晶封裝將面臨晶片的薄化、錫球尺寸縮小與錫球間距的減少，故在IC晶片與基板的連接逐成為一大挑戰。在IC晶片因應輕薄短小設計為前提下，製程與開發必須將從材料著手。對錫球保護而言關鍵材料莫過於底膠。本研究探討因為晶片、有機基板、凸塊和底膠材料之熱膨脹係數不同，當溫度變化時整個封裝出現的翹曲變形現象。 本文中針對覆晶封裝製程中，因為晶片、有機基板、凸塊和底膠材料之熱膨脹係數不同，當溫度變化時整個封裝出現的翹曲變形現象。特別是針對充填用的底膠材料進行分組實驗，實驗方式依據不同的材料特性搭配其不同的玻璃轉換溫度(Tg)設立烘烤條件，目的在於如何能夠調整晶片、基板和凸塊之間的熱膨脹係數差異，來強化銲錫連接的強度，降低疲勞應力。最後將最佳測試條件結果藉由可靠度測試封裝產品壽命是否符合業界規範。
並列摘要
In the semi-conductor assembly technology industries, following process of the technology, the development trends of different electric equipment products move towards the light, thin, short, small, and multi-functional merger direction. At present semiconductor encapsulation manufacturing fields all move towards the high density, high pin-foot, and high I/O. Following this semi-conductor assembly technology trends, the wire bonding manufacturing process of the semi-conductor assembly goes also towards the high precision wire bonding technology with fine pitch bonding , chip thinning and bonding size , so it is a challenge in IC chip and Substrate interconnection. In IC chip want light thin and short premise, process develop must begin on material. For bonding ball protect, the key material is Underfill. This report is for thermal expansion factor between chip 、Substrate 、 bonding and Underfill material , all package happen shape phenomenon when temperature change . This paper is light for when flip chip process, due to chip, Subtrate, Bump and Underfill coefficient of thermal expansion is not the same, when temperature change whole process appears warpage status. Especially for Underfill material we did an experiment to divide into group, according different property collocation their glass transition temperature (Tg) we set baking conditions, our goal is how to tune up different of chip, Subtrate, Bump and Underfill coefficient of thermal expansion to strengthen Bump joint, to reduce fatigue strength. Our optimum experimentation result will use flip chip reliability test to confirm to Joint Electron Device Engineering Council (JEDEC) specification.