採用Top-Down設計流程快速雛形化 具高精確度頻偏補償之OFDM系統

Rapid Prototyping of OFDM System with Highly Accurate Carrier-Frequency-Offset Compensator by Using Top-Down Design Flow

張智淵(Chih-Yuan Chang)

指導教授 ： 鍾日龍

中原大學/工學院/電子工程研究所/碩士(2011年)

https://doi.org/10.6840/cycu201100592

摘要

本論文，吾人採用Top-Down設計流程並使用Xilinx公司之System Generator來快速開發一具高精確度頻偏補償之OFDM系統雛形。首先，吾人撰寫MATLAB程式碼來模擬待實現系統的效能，作為硬體實現的參考值，接著，吾人採用Mathworks公司開發的Simulink搭配Xilinx公司發展的System Generator，省去撰寫Verilog/VHDL的時間，來快速雛形化此系統。硬體實現上，吾人分別完成了OFDM發射機、載波頻偏通道、雜訊通道、頻偏補償器以及OFDM接收機之設計，為了更完全移除載波頻偏造成載波間干擾，本論文實現複雜度較高但具較高精確度之頻偏補償器。最後，藉由硬體效能分析，此系統總計花了15,222 slices。

關鍵字

載波頻偏 ； 系統產生器 ； Top-Down設計流程 ； 正交分頻多工

並列摘要

In this thesis, we adopt the top-down design flow and use the Xilinx System Generator for rapid prototyping the orthogonal-frequency-division multiplexing (OFDM) system with highly accurate carrier-frequency-offset (CFO) compensator. First, we program the MATLAB codes for evaluating the performance of the target system, as for the reference of hardware implementation. Next, we adopt the Simulink design tool of Mathworks incorporated with the System Generator of Xilinx, to save the hardware programming time and thus rapidly prototype the system. As for hardware implementation, we complete the designs of OFDM transmitter, CFO channel, noise channel, CFO’s compensator, and OFDM receiver, respectively. In this thesis, we also realize the high complexity but high accurate CFO’s compensator to completely remove the inter-carrier interference (ICI) due to the CFO. Finally, by analyzing the performance of the hardware, the system use 15,222 slices.

並列關鍵字

OFDM ； Carrier-Frequency-Offset ； System generator ； Top-Down Design Flow

參考文獻

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