在高速數位傳輸的時代下,電子產品追求著輕薄短小,使得印刷電路板(Printed Circuit Board, PCB)內部電路佈線越加緊密,進而產生訊號完整性(Signal Integrity, SI)、電源完整性(Power Integrity, PI)等問題出現。 本論文針對訊號線受到電源耦合產生的雜訊影響來做分析,探討在電源層和訊號線之間的間距變化下,單根訊號線和差模訊號分別耦合到的電源雜訊大小變化,並且搭配耦合係數的變化和電場分佈的變化來做更進一步的分析,最後依據數據得出在差模訊號線的結構下,訊號線受電源雜訊的影響會較小。
In the era of high-speed digital transmission, electronic products are pursuing thinness and shortness, which makes the internal circuit layout of the printed circuit board (PCB) more compact, and results in signal integrity (SI) and power integrity (PI) and other issues. This paper analyzes the influence of the noise generated by the power coupling to the signal line. There discusses the change of the power noise when the single signal line and the differential signal line are coupled to on the change of the distance between the power layer and the signal line, and coordinate the change of the coupling coefficient and the change of the electric field distribution for further analysis. Finally, according to the data, it is concluded that the signal line will be less affected by power noise on the structure of the differential signal line.