近年來,因互連網及手持式裝置大量盛行,導致龐大資料的存儲及高速傳輸和處理已成為目前所有電子產品必須擁有的基本特徵。而目前高速信號傳輸實現的方法主流大多採用差動信號設計。差動信號傳輸為其在一對信號上分別給予兩個振幅相同且及極性相反的兩個訊號,透過兩個訊號之間的電壓差來達到訊號傳送之目的。差動信號有其兩個優點ㄧ為抑制雜訊能力較佳。其次,降低EMI干擾。 因目前訊號發展無論是傳輸或是流量上均是爆炸性的成長,因此在產品設計上線路的複雜程度與以前皆是不可同日而語,所以PCB的佈線層數也成倍數成長;而本論文所研究與探討的新一代印刷板層次的佈線技術”雙帶線”因此誕生,利用加大佈線層與層中間的距離,減少佈線層與層中間的接地層,藉此減少PCB層數達成高密度空間佈線及節省PCB成本之目的。 本論文主要在分析PCB設計中採用雙帶線結構設計時其差動與單端信號間,差動對與差動對信號間共模雜訊及差模串音之效應。分析之變數主要為層面厚度差異、信號線平行交疊不同程度,信號線交疊不同角度。透過軟體模擬顯示去分析三種不同變數情況下差動-單端、差動-差動信號間對共模雜訊及差模串音的影響。最後並藉由實作部份模擬情況的PCB Layout結構,經由量測的結果去驗證與其模擬理論趨勢的一致性。其分析結果並同時印證了在業界中Layout時其信號完整性(Signal Integrity)遵守的準則。
Nowadays Internet and mobile devices are becoming more and more popular. As a result storage and high-speed transmission and processing of big data have gradually become must-have features of most electronic products. Currently the mainstream of performing high-speed signal transmission is to use differential signal design. There are two main advantages of differential signal, one is noise reduction and another is better EMI immunity. Based on current trend of signal development and the exponential growth of data traffic and transmission speed requirements, circuitry design is becoming more complex and quite different than before, and PCB routing layers also have to be increased by multiple times. Research and discussion on this thesis is for next-generation routing technology - Dual Stripline. The tactics are to deploy two signal layers adjacent to each other while increasing their spacing at the same time, and reduce the amounts of ground layers between different signal routing layers. It contributes to higher routing density, fewer PCB layers and therefore lower PCB cost. In this thesis, the main theme is to analyze the effect of differential crosstalk and common-mode noise between differential pairs when adopting dual strip-line structure in PCB design. Analysis of the main variables include the effect of common-mode noise and differential crosstalk with varying thickness and parallel trace overlap, as well as different angles on overlapping layers. In the end, by comparing the practical measured data of a fabricated PCB with the simulated result to verify their consistency. The analysis also confirmed the guidelines in the industry whose signal integrity follow the compliance when layout implementation.