本論文利用我們所提出的MOS-BJT-NDR電子電路架構,以實現傳統的共振穿透二極體之負微分電阻電路之特性。並且利用這些基本的負微分電阻電路單元進行相關的用電路之模擬、分析與設計。首先提出三種不同MOS-BJT-NDR電路架構,再以此三種電路架構,進行串並聯的電路型式,來獲得多峰值的負微分電阻電路。此MOS-BJT-NDR電路可視同一般共振穿透二極體元件,不需考慮製程中晶格匹配問題,更具有容易調變峰值與谷值電流之負微分電阻電路特性。 論文中利用H-SPICE之電子電路模擬軟體來進行我們所提出的MOS-BJT-NDR電路之設計與分析。進一步利用所擬的結果,以實際下線,送交台積電(TSMC) 0.35SiGe_3P3M製程技術製作晶片,以證明其可行性與可靠性,並以量測儀器Tektronix 370B、HP4155A來量測其I-V特性曲線,最後再與H-SPICE模擬的結果做比對。電路應用部分,則以此MOS-BJT-NDR電路的基本單元架構,利用串並聯來獲取所需之多峰值電路。 最後,提出一種新的電路架構,此種架構可以提高電路的操作速度,並利用H-SPICE軟體完成多值電路結構。在數位邏輯的應用方面,亦極具有其發展潛力。
In this thesis we propose MOS-BJT-NDR circuits to fulfill the NDR characteristics of traditional resonant tunneling diodes. We also utilize the basic MOS-BJT-NDR cell to proceed with further study by simulation, analysis and design. In the beginning we present three different kinds of MOS-BJT-NDR circuits and put these circuits into parallel or serial structure to achieve multi-peak NDR circuits. These MOS-BJT-NDR circuits can be used as resonant tunneling diode device without considering the match problem of crystal lattice. It has the advantage of adjusting the peak current or valley current easily. We use H-SPICE software to simulate those MOS-BJT-NDR circuits. Not only analyze these circuits but also design it. In order to prove the possibility and reliability, we use detailed simulation results to implement these NDR circuits into IC chips by TSMC 0.35SiGe_3P3M process. We verify those I-V characteristics of NDR circuits by Tektronix 370B and HP 4155A instruments and compare with H-SPICE simulation results. In the application of NDR circuits, we base on those MOS-BJT-NDR circuits to acquire multi-peak circuits by parallel or serial structure. Finally, we propose a new NDR circuit. It has the high-speed character. We will accomplish the new multi-peak NDR circuit by H-SPICE software. It will have a high potential in digital logic application.