循環式類比數位轉換器的設計與製作

近年來由於可攜式影像數位產品的盛行，因此電路設計需要低消耗功率技術以延長電池在整體系統的使用時間，其中類比數位轉換器廣泛使用於影像感測系統、數位相機等可攜式電子產品系統，至於類比數位轉換器有許多種實現的架構，與其它架構相互比較，循環式類比數位轉換器具有較小面積、較低消耗功率與高解析度的優點。本論文將以低電壓與低功率為設計考量，並使用雙重取樣技術實現一個十位元的循環式類比數位轉換器。本論文中，電路包含了取樣保持電路、次類比數位轉換器、次數位類比轉換器、解碼器、暫存器、脈波產生器以及多工器。本研究使用TSMC 0.35um 2P4M的製程進行設計與製作，根據模擬結果，在電源電壓為1.5V下，輸入電壓範圍為±0.5V，整體之功率消耗約為8.6mW。

關鍵字

類比數位轉換器

並列摘要

In recent years, the portability systems become popular. It makes the demand for low voltage and low power circuit increased, such as sensor devices and bio-medical applications. The aim of this thesis is to investigate the design techniques of 10-bit Cyclic ADC for low voltage and low power applications. The target architecture is an Cyclic ADC with the double-sampling technique. The Cyclic ADC consists of the sample-and-hold circuit, sub-ADCs, sub-DACs, decoders, clock generator and multiplexers. In this research, the Cyclic ADC with double-sampling technique has been designed in standard TSMC 0.35um CMOS 2P4M process. Simulation results show that under the 1.5V power supply and the input range of ±0.5V, and the estimated power dissipation is about 8.6mW.

並列關鍵字

Analog-to-Digital Converter

參考文獻

[1] BehzadRazavi, “Principle of Data Conversion System Design,” John Wiley and Sons Publishers, 1995.

[2] David A. Johns, K. Martin, “Analog Integrated Circuit Design,” John Wiley and Sons Publishers, 1997.

[3] Y.-K. Chang, C.-S. Wang, and C.-K. Wang, “A 8-bit 500KS/s low power SAR ADC for bio-medical applications,” in Proc. IEEE Asian Solid-State Circuits Conf., Nov. 2007, pp. 228-231.

[4] P.W. Li, M. J. Chin, P.R. Gray, R. Castello, “A ratio-independent algorithmic analog-to-digital conversion technique,” IEEE Journal of Solid-State Circuits, vol. 19, issue 6, Dec. 1984, pp. 828-836.

[5] David A. Johns, K. Martin, “Analog Integrated Circuit Design,” John Wiley and Sons Publishers, 1997.

國際替代計量

循環式類比數位轉換器的設計與製作

未授權

主題瀏覽