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  • 學位論文

雙層超薄Ru/Ta-Si-C擴散阻障層與銅連導線製程特性探討

Properties of Ultrathin Ru/TaSiC Bi-Layer Diffusion Barrier for Cu Interconnects

指導教授 : 方昭訓
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摘要


ITRS 國際半導體技術藍圖指出在2016年銅製程阻障層厚度必須降至2 nm,而在降低厚度的同時,阻障層也需具備低電阻率與優良的高溫熱穩定性,且能阻擋銅擴散到矽基材產生銅矽化合物。相關研究指出傳統多晶阻障層在高溫下銅將藉由晶界擴散到矽基材,進而產生銅矽化合物導致元件失效。若能選擇非晶質阻障層則可減少銅沿晶界擴散,提升阻障層性能。 為因應階梯覆蓋性,以電鍍製程製備銅金屬層為另一發展重點趨勢。本研究在矽基板上濺鍍沉積超薄非晶質Ta-Si-C阻障層後再沉積Ru晶種層,再以電鍍製備Cu/Ru(1 nm)/Ta-Si-C(1 nm)/Si多層結構,經熱處理後探討其熱穩定性。實驗以四點探針(FPP)分析電性、X光繞射分析儀(XRD)進行結構分析、掃描式電子顯微鏡(SEM)觀察表面形貌、穿透式電子顯微鏡(TEM)觀察薄膜橫截面,並以附著力測試檢視薄膜與基板之附著性。 實驗結果顯示以電鍍法沉積製備出Cu/Ru(2 nm)/Si結構,其失效溫度為550 oC /5分鐘。由此可知Ru層可作為銅晶種層,但對於銅擴散有一定的效果。由附著性測試可知,電鍍液加入聚乙二醇(抑制劑)與尿素(平整劑)之後,薄膜對基板的附著性大為提升。接著以電鍍銅製備Cu/Ru(1 nm)/Ta-Si-C(1 nm)/Si多層結構,分析指出溫度上升到700 oC熱處理時出現銅矽化合物相(Cu3Si),並由表面觀測出現Cu3Si相白色矩形物。因此Cu/Ru(1 nm)/Ta-Si-C(1 nm)/Si多層結構失效溫度為700oC/5分鐘。

並列摘要


International Technology Roadmap for Semiconductors (ITRS) indicates that the barrier thickness for Cu metallization should be reduced to 2 nm in 2016. The barrier should have low resistivity and high thermal stability when reducing the thickness, and can block Cu diffuse into Si substrate to form Cu3Si. Many studies have reported that Cu atoms usually diffuse to Si substrate through grain boundary of barrier at a high temperature; thus the device fails because of the formation of Cu3Si. Therefore the property of barrier can be improved using the amorphous barrier. Cu thin film prepared by electroplating process is very promising to improve the step coverage. This study therefore aims to sputter deposit ultrathin amorphous Ta-Si-C barrier and Ru seed layer on Si substrate, and Cu/Ru(1 nm)/Ta-Si-C(1 nm)/Si stacked film was prepared by subsequently electroplating Cu thin film. The failure mechanism and the thermal stability were discussed thereafter. The resistance of the film was measured by a four-points probe (FPP), crystal structure was analyzed by x-ray diffraction (XRD), the surface morphology was observed by scanning electron microscope (SEM), the cross-sectional stacked film was observed by transmission electron microscopy (TEM), and the adhesion between the film and substrate was surveyed by adhesion test. The experimental results indicated the failure temperature was 550 oC/5 min for Cu/Ru(2 nm)/Si stacked film. Ru can be a seed layer, and also can effectively block Cu diffusion. From the adhesion test, the adhesion between the film and substrate was improved greatly when adding PEG (suppressor) and urea (leveler) in electroplating solution. Cu3Si phase appeared after 700oC annealing when analyzing crystal structure of the Cu/Ru(1 nm)/Ta-Si-C(1 nm)/Si stacked film. The result showed the Cu/Ru(1 nm)/Ta-Si-C(1 nm)/Si stacked film has a failure temperature of 700 oC/5 min.

參考文獻


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被引用紀錄


林坤彥(2015)。鉭錳合金及銅鍺化合物應用於積體電路後段製程中銅導線之研究〔碩士論文,國立中央大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0031-0412201512052304

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