本論文提出具有具有一階與二階溫度補償之參考電壓設計。藉由適當的組合具有正溫度係數與負溫度係數的電壓參數完成具有一階溫度補償的參考電壓後,再對負溫度係數電壓進行二階非線性溫度補償。相較於已知電路,本論文提出之電路具有架構簡單、較少晶片面積,與低功率消耗等優點。 本論文除了詳細敘述工作原理以外,並使用0.35微米製程參數進行佈局,以及使用HSPICE電路模擬軟體執行佈局後模擬,電路供應電壓為2.4V溫度變化範圍則為-20℃~120℃。CMOS 二階溫度係數補償單端輸出參考電壓,輸出電壓約為1.3V,輸出電壓變化量為9.63mV、消耗功率為0.846mW、溫度係數則為53.1ppm/˚C。而CMOS 二階溫度係數補償差動輸出參考電壓,輸出電壓約為460mV,輸出電壓變化量為4.85mV、消耗功率為0.581mW、溫度係數則為75.4ppm/˚C。 模擬結果顯示本論文的可行性。本論文所提出溫度係數參考電壓電路可適用於各種類比積體電路。
In this thesis we have presented the design methodology of reference voltages with first and second order temperature compensation. After suitable combination of the positive temperature-coefficient and the negative temperature-coefficient parameters, a first-order temperature-compensation reference voltage can be achieved, and then the negative temperature-coefficient parameter is further compensated as the so-called second-order nonlinear temperature compensation. Detailed design principles have been disclosed in this thesis, and the HSPICE simulation programs and Laker with 0.35-μm process parameters have been used to perform the simulation, layout, and implement the circuits. The presented circuits are with the supply voltage of 2.4V and the temperature ranges from -20°C~120°C. the output voltage of the presented CMOS second order temperature coefficient compensation single output reference voltage is 1.3V and the output voltage variation is 9.63mV. Moreover, the corresponding power dissipation is 0.846mW and temperature coefficient is 53.1ppm/˚C. Also, the output voltage of the CMOS second order temperature coefficient compensation differential mode output reference voltage is 460mV, and the output voltage variation is 4.85mV, the corresponding power dissipation is 0.581mW, the temperature coefficient is 75.4ppm/˚C。 The proposed CMOS reference voltage circuits can be applied to vehicle electronic devices design and other digital and analog circuits.