- 學位論文
低功耗手術機械臂之硬體加速逆向運動學
Hardware Accelerated Inverse Kinematics for Low Power Surgical Manipulators
摘要
本論文主要針對醫療機器人領域進行研究。論文中提出以硬體加速設計提升逆向運動學計算，使能在精度範圍內達到最快之控制速度，改善外科手術機械臂之控制架構。硬體加速器以FPGA電路實現逆向運動學計算，透過優化設計達成縮小FPGA中邏輯電路模組並達成提高6自由度機械臂逆向運動學計算精度的整合設計，能在給定機械臂終端之卡氏座標回推到六軸馬達對應之角度。本論文使用National Instruments myRIO作為系統整合架構的基礎，其中包含在CPU上運行軟體之驅動程式及FPGA電路之硬體加速器。本研究透過點到點、線性以及圓形軌跡等實驗對提出之逆向運動學進行驗證。論文中將16位元、24位元和32位元之FPGA版進行精度之比較，結果顯示在32位元中，其最大誤差為0.2mm，而平均誤差為0.07mm。速度方面16位元僅需11微秒，24位元為28微秒，32位元也只需要35微秒之處理速度。本論文提出之方法性能優於myRIO A9及在i7 CPU上執行之代數法，執行速度與在i7 CPU上之幾何法相似，功率消耗卻降低約100倍。實驗結果證明所提出之運用於機器人控制器硬體加速逆向運動學之正確性及實用性，能以更快的控制速度處理對機械臂之運動軌跡，可應用於影像導航中進行快速避障，並在動態且複雜之環境中精確移動，而建立分散式系統亦能減輕內核之負擔，為其他模組釋放資源。
並列摘要
We focus our research in the field of Medical Robotics. Robots have been developed to improve the quality of service in medical institutions. Their assistance and help spread from robot-cleaners to surgical manipulators performing or assisting real surgeries. Latter is capable of performing operations, that were unimaginable and impossible before. Among those: moving target operations, precision assistance, distant deployment, and autonomous behavior. Naturally, this functionality comes to face the resource and computation limitations of a system. The optimization goal is to discover ways to push beyond the edge and achieve new heights. We explore surgical manipulator control architecture and look for possibilities for improvements. The control rate is a central parameter, which affects both precision and processing load. We refactor the Inverse Kinematics pipeline stage, searching for the fastest solution in the current precision domain. As we stick with mobility concepts, small low-powered controllers are used. We use National Instruments myRIO device as a base for integrated architecture, containing main driver running software on CPU and Hardware Accelerator running in parallel as an FPGA circuit. Hardware Accelerator implements Inverse Kinematics calculations in a circuit and is fast to compute. FPGA design is optimized for speed and size. We configure cloned and shared modules, setup number precision, data type and rounding modes across operations. The acquired solution is tested alongside fellow algorithms running on different processing platforms. FPGA hardware accelerator computes inverse kinematics solution, producing rotation frame of six joints, given end-effectors Cartesian Coordinates X, Y, Z, tool rotations Yaw, Pitch, Roll, and remote center of motion insertion. We validate the solution by testing point solutions, point orientations, linear and circular trajectories. We then verify the correctness of the output and follow it with graphical representation in the robot simulator. Precision testing went through a comparison between 16, 24 and 32-bit implementations Results showed that 32-bit architecture performs within a 0.2 mm error range, making it 0.07 mm average error. Performance tests showed hardware accelerated inverse kinematics solution taking as little as 11 microseconds for a single 16-bit solution, 28 µs for 24-bit, and 35 µs bit for 32-bit implementation. This outperforms numerical methods in desktop-class i7 CPU implementation and closed-form solution in myRIO A9 processor. It works as fast as closed-form geometrical solution in i7 CPU while consuming up to 100x times less power. Therefore, experimental results demonstrate that the proposed hardware accelerated inverse kinematics for a robot manipulator is correct and useful. Faster control rate yields better responsiveness in guided movement, faster collision reaction during image navigation, accurate movement along a complicated or dynamic path, etc. Building a distributed system offloads the main core, freeing resources for other modules.