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  • 學位論文

開源碼RISC-V處理器的SD Card檔案系統支援及FreeRTOS下的整合設計

Design of SD Card File System Support under FreeRTOS for an Open-source RISC-V Processor

指導教授 : 蔡淳仁

摘要


過去十多年,ARM核心隨著智慧手機的興起成為嵌入式系統處理器的主流。但由於ARM公司對市場技術的嚴格掌控,學界和業界便合力推行新的RISC-V指令集,以其開源特性、精簡架構、和模組化與可擴充的優勢,在全球市場已經造成風潮。 本論文的研究方向主要在於擴展本實驗室所開發的開源RISC-V 32位元處理器Aquila的軟體支援度,我們將在Aquila SoC系統上加上Xilinx AXI Quad SPI IP,並實作支援FAT32檔案系統的軟體程式庫,透過讀寫IP的暫存器讓SPI IP與SD Card 內建的I/O控制器溝通,使軟體可以對SD Card進行讀寫,並支援FAT32檔案系統。另外,我們也修改Aquila核心,以增加支援RTOS kernel的指令及中斷機制。在本論文中,我們使用的是FreeRTOS即時作業系統。這個RTOS廣泛應用於IoT,適合低功耗、低成本的嵌入式系統使用。 在成果的驗證上,我們整合了FreeRTOS+FAT32檔案系統模組,並實作了 on-chip的 boot code,使得Aquila SoC可以成為一個獨立的 turnkey系統。在開機後,系統會從FAT32格式的SD卡上讀取FreeRTOS應用的系統ELF檔,並下載到DDR3主記憶體中開始執行以啟動系統。在論文的實驗部份,我們會在Xilinx KC-705 開發板上合成全系統,評估SD Card的讀寫效能,以及實驗在FreeRTOS下Context Switch的效率。

並列摘要


For the past decades, ARM cores have become the mainstream processors for embedded systems due to their success on smartphone devices. However, due to ARM’s strict control on how their IP are used, the academia and the industry have join forces on the promotion of a new RISC-V ISA. With its open source nature, streamlined architecture, and modularity and scalability, RISC-V has created a new ecosystem in the global market. The research direction of this thesis is to extend the open source RISC-V 32-bit processor, Aquila, developed in our laboratory. We will add Xilinx AXI Quad SPI IP to the Aquila SoC and implement an FAT32 I/O library in software. The library routines will read and write the I/O registers of the SPI IP to communicate with the SD Card I/O controller so that the it can read and write the SD Card and support the FAT32 file system. In addition, we will extend the instruction support and the interrupt mechanism for RTOS kernels. In particular, the real-time OS FreeRTOS that is suitable for low power IOT devices will be used in this thesis. Finally, for the verification of the proposed implementation, we will integrate the FreeRTOS and the FAT file system module, and modify the on-chip boot code to design a turnkey system. Upon power-up, the system will read the FreeRTOS system ELF file from the SD card and load it to the DDR3 main memory for execution. For performance evaluation, we will synthesize the complete system on a Xilinx KC-705 development board and evaluate the read/write performance of the SD Card and the Context Switch overhead of FreeRTOS.

並列關鍵字

RISC-V SoC SD Card File System FreeRTOS

參考文獻


[1] J. L. Hennessy and D. A. Patterson, Computer architecture: a quantitative approach, Elsevier, 2011
[2] A. Waterman, K. Asanovi ́c, “The RISC-V Instruction Set Manual Volume II: Privileged Architecture, Document Version 20190608-Priv-MSU-Ratified”, June 8th, 2019, [On-line] Available: https://riscv.org/specifications/
[3] RISC-V, Rocket Chip Generator Project. [Online] Available: https://github.com/freechipsproject/rocket-chip
[4] ETH Zurich, PULP Platform Project. [Online] Available: https://pulp-platform.org/
[5] 巫謹佑,「基於RISC-V指令集架構的SoC之設計與實作」,國立交通大學,碩士論文,民國108年。

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