透過您的圖書館登入
IP:18.216.196.208
  • 學位論文

3D堆疊TSV的電氣特性之研究

The study of electrical characterization of 3D stacked TSV simulation

指導教授 : 黃有榕
共同指導教授 : 潘宗龍(Chung-Long Pan)

摘要


3D-IC伴隨著摩爾定律的預測迅速的發展,3D-IC提供一種提高集成度的方法,其中矽通孔(Through-Silicon Via)為其中的關鍵組成,因為矽穿孔(TSV)技術提供了新的互連技術,在3D-IC中扮演著非常重要的作用。本研究利用3D高頻結構模擬軟體(HFSS)對矽穿孔(TSV)模型,擷取出矽穿孔(TSV)模型的S參數( S-parameters) 進行傳輸信號模擬。 本論文研究多個矽穿孔(TSV) 之間的傳輸信號特性,並探討多個TSV堆疊形成之3D-IC及圓柱形,錐形,環形,同軸TSV形狀對傳輸信號特性之影響。 還有模擬矽穿孔(TSV)在製程過程中產生的空隙對傳輸信號特性之影響。

關鍵字

none

並列摘要


3D-IC Accompanied by rapid advances in the prediction of Moore's Law, 3D-ICs offer a way to increase integration where Through-Silicon Via is a key component because TSV technology offers new The interconnection technology, plays a very important role in the 3D-IC. In this study, we used 3D high frequency structure simulation software (HFSS) for the TSV model to extract the TS parameters of the TSV model S-parameters) for transmission signal simulation. In this dissertation, the transmission signal characteristics between TSVs and the effects of 3D-IC and cylindrical, conical, toroidal, coaxial TSV shapes formed by multiple TSV stacks on the transmitted signal characteristics are investigated. There is also the effect of voids created during the TSV process on the transmitted signal characteristics.

並列關鍵字

none

參考文獻


[1] H. John, Lau, evolution, challenge, and outlook of TSV, 3D IC integration and 3d silicon integration, Proceeding of International Symposium on Advanced Packaging
[3] D. M. Jang, C. Ryu, K. Y. Lee, B. H. Cho, J. Kim, T. S. Oh, W. J. Lee, and J. Yu, Development and Evaluation of 3-D SiP with Vertically Interconnected Through Silicon Vias (TSV)," in Proc. Electronic Components and Technology Conference, May 2007, pp. 847~852.
[4] E. M. Chow, V. Chandrasekaran, A. Partridge, T. Nishida, M. Sheplak, C. F. Quate, and T. W. Kenny, Process Compatible Polysilicon-Based Electrical Through-Wafer Interconnects in Silicon Substrates," IEEE/ASME Journal of Microelectromechanical Sysems, vol. 11, no. 6, pp. 631~640, Dec. 2002.
[5] C. Xu, H. Li, R. Suaya, and K. Banerjee, “Compact AC modeling and analysis of Cu, W, and CNT based through-silicon vias (TSVs) in 3-D ICs,” in IEDM Tech. Dig., 2009, pp. 521–524.
[6] M. Celik, A. C. Cangellaris, and A. Yaghmour, “An all-purpose transmission-line model for interconnect simulation in SPICE,” IEEE Trans. Microwave Theory Tech., vol. 45, pp. 1857–1867, Oct. 1997.

延伸閱讀