- 學位論文
PIPORS: 一平行輸入平行輸出暫存器交換系統
PIPORS: A PARALLEL INPUT PARALLEL OUTPUT REGISTER SWITCHING SYSTEM
摘要
在現行的通信系統或網路上，為了有足夠快的資料交換速度，通常需要一個具有低資料遺失及低傳輸延遲的高速交換系統。許多有關此方面的研究，均運用分時多工的技術（STDM）設計集中式共享記憶體交換系統（CSMS），以達到較高的效能。此種交換系統，輸入埠與輸出埠共享一塊記憶體，並且具有相同的資料交換速度。但是，CSMS 在輸入埠與輸出埠分別使用多工器及解多工器傳送資料；因此，資料傳送的速度受到輸入埠與輸出埠的數量及交換系統內部的執行速度限制。如果交換系統內部的執行速度固定，則較多的輸入埠與輸出埠，將降低資料的傳送速度。而且，如果某一個輸入埠的交通負載（traffic load）較為繁重，則可能佔用全部的共享記憶體，將使得其他的輸入埠發生資料遺失。因此，CSMS 不能有效的避免資料擁塞的發生。而且在此種交換系統的控制單元裡，需要使用大量的記憶體儲存資料在共享記憶體的位址，將使得記憶體儲存資料的使用率降低。這對於未來需求較高傳輸速度的交換系統而言，實在不是一個很適當的設計方法。 為了克服上述交換系統的缺點，我們在本論文中，提出一個全新架構的高速交換系統，稱之為平行輸入平行輸出暫存器交換系統（PIPORS），這個系統是由n 個小型分散式共享記憶體模組（SMM）與一個 nn 移位暫存器交換陣列（SRSA）互相連接組合成為一個圓形的交換架構，此種架構可同時輸入及輸出資料。藉由使用分散式資料儲存，在一個 nn PIPORS，能夠同時平行輸入與平行輸出資料。因此，這種架構的交換系統，資料擁塞將有效的降低，並且內部執行的速度不需要比輸入/輸出埠快 n 倍，PIPORS 的效能將比 CSMS 有效的改善。 現今有許多通信系統或網路應用需要使用比本論文中提出的 nn PIPORS 容量較大的交換系統。因此，設計一個交換系統最重要的考慮因素之一為交換系統容量的擴充。交換系統必需能夠以模組的方法，由數個小容量的交換系統擴充成為一個大容量的交換系統。而且不致因為容量的擴充，而使得交換系統的效能及穩定性大幅降低。 本論文將提出三種擴充的方法：（1）交換系統輸入/輸出埠數量的擴充方法、（2）交換系統內部記憶體容量的擴充方法、（3）結合交換系統輸入/輸出埠數量及內部記憶體容量的擴充方法。 最後，我們將以下列參數對交換系統的效能作評估：總記憶體的需求、交換效能、資料的遺失率及平均資料傳輸延遲。在這些參數之中，資料的遺失率是最重要的參數，主要由網路的交通負載及交換系統記憶體放置的方法作為決定因素。本論文將使用 SMPL 模擬軟體對 PIPORS 與 CSMS 在總記憶體的需求、交換效能、資料的遺失率及平均資料傳輸延遲上，作仔細的比較分析；模擬結果顯示 PIPORS 總記憶體的需求最少、交換效能最高、資料的遺失率最低、平均資料傳輸延遲最短。因此，PIPORS 在各方面均有較好的效能表現。
並列摘要
In order to make data switch speed fast enough for supporting the current communication systems or networks, a high speed switching system with low data loss and low transmission delay is required. Many researchers make use of Statistical Time Division Multiplexing (STDM) technique in the Central Shared Memory Switching System (CSMS) in order to achieve a higher throughput. In the CSMS, the input and output ports share a piece of common memory, where the input data and output data can arrive and possibly be transmitted at the same time respectively. But, the CSMS use multiplexer and demultiplexer at input and output ports respectively for transmitting data. In each time slot the multiplexer and demultiplexer have to process the input data and output data for the input and output ports respectively. Thus, the speed of data transmitted is limited by the number of input and output ports as well as the internal operation speed of the switching system. If the internal operation speed is fixed in switching system, the more input and output ports are included, the lower data transmission speed is observed. Furthermore, if the traffic load should be heavy in one of the input ports, the total shared memory will be occupied by this input port. This fact keeps other input ports from transmitting data and results in possible data loss. Therefore, it can not avoid data contention effectively. Furthermore, the control section needs a great deal of memory to store data address, the memory utilization ratio of storing data will be low. This designing philosophy is really not an appropriate way as subjecting to the demand trend for higher speed switching system in the future. To overcome the drawbacks of the switching system mentioned above, a new architecture of a Parallel Input Parallel Output Register Switching System (PIPORS) is proposed in this dissertation. The PIPORS is based on the interconnection of the n small distributed/parallel Shared Memory Modules (SMMs) and an nn Shift Register Switch Array (SRSA), and it is connected in a ring topology. The operations can be performed on n input/output ports simultaneously. By adopting the distributed data storage and data can parallel input/parallel output in the nn PIPORS simultaneously. Therefore, the switching system contention will effectively be reduced and the internal execution speed must not be n times faster than the speed of input/output port. The performance of PIPORS will be effectively promoted. Nowadays, there are many communication system or network applications in which the required size of the switching system is larger than the proposed nn PIPORS. Therefore, one of the important requirements for designing a switching system is its growability. The architecture should permit modular growth of its size from a small number of ports to a very large switching system. It is also desired that this growth does not result in performance degradation significantly and can meet the requirement of reliability at each stage of the expansion. In this dissertation, there are three types of expansion method to be proposed: (1) input/output port size expansion method, (2) memory expansion method, and (3) combined input/output port size and memory expansion method. Finally, performance evaluation of a switching system depends on various parameters: total memory required, throughput, data loss probability, and average data delay. Among these, data loss probability is one of the most important factors, and depends strongly on network traffic and buffering method. In our simulation, the SMPL (SiMulation Program Language) is adopted to simulate the four different switching systems, Link-list based CSMS, Hybrid CSMS, CAM based CSMS, and PIPORS. According to the results from different simulations as conducted, PIPORS has the merits of the best throughput, the least data loss probability and the shortest average data delay. Therefore, PIPORS is believed to be the most efficient among these switching systems.