由於電路效能的規格日益提高,利用時序差異的區域性以縮短時鐘週期,已成爲高效能電路設計的趨勢。因此,如何使用最少的佈局成本,實現非零時序的時鐘樹,已成爲重要的研究課題。過去相關的研究,主要是根據一個給定的時序差異排序結果,進行佈局實現。在本篇論文中,我們將依據文獻[10,11]所提出之時鐘樹模型,探討非零時序差異時鐘樹之設計及最佳化。我們將說明,能夠達到最小時鐘週期値的最佳非零時序差異排序,並非唯一。因此,爲了最小化時鐘樹實現的成本,最佳非零時序差異排序應該謹愼的選擇。基於此想法,本篇論文提出一個有效的非零時序差異時鐘樹設計方法,以使用最少的佈局成本,達到最小時鐘週期値。我們的實驗結果,分成以下兩方面:第一,在大部分的情況,能夠達到最小時鐘週期値的最佳非零時序差異排序,並非唯一,因此我們的想法是實際的;第二,在大部分的情況,我們所提出的設計方法,可以在極短的時間内,得到最小成本的非零時序差異時鐘樹設計。
As the demand of high performance circuit continues to progress, there is a growing need to exploits localized clock skew to minimize the clock period. But the crucial problem is the cost optimization of the layout realization of non-zero skew clock tree. The main drawback of previous works[10,11]is that the non-zero skew clock tree is designed with respect to a given clock schedule. In this paper, we demonstrate that the optimal clock schedule is not unique. In order to optimize the cost of non-zero skew clock tree, the optimal clock schedule should be carefully chosen. Based on the basic idea, we propose an effective methodology to design nonzero skew clock tree with minimum cost under the constraint of minimum clock period. Benchmark data consistently shows that our concern is practical and our approach achieves very good results within very few run times.