透過您的圖書館登入
IP:3.143.9.223
  • 期刊

真空電漿表面預先改質觸發超微密晶種及超薄無電鍍銅金屬化導線

Initiating Ultrafine Catalytsts and Ultrathin Electrolessly Plated Cu Metallization Interconnects Using Vacuum Plasma Surface Pre-modification

摘要


本研究發現,依序採用N2−H2真空電漿及化學溶液雙重表面改質,結合一種創新的催化晶種生長方法,不但能促使SiO2介電薄膜之表層植入尺寸僅有3nm之超微晶種,且能使其密度提升20倍以上(與事先未採用電漿表面改質比較)。本文將利用高解析平面掃瞄式電子顯微術(SEM)及穿透式電子顯微術(TEM)探討,一般晶種及此種超密微晶種所觸發之無電鍍Co-P阻障層的孕育及成長差異,並證實此種超密集、超細微晶種能促成厚度僅10nm的阻障層。X光光電子能譜術(XPS)及傅立葉轉換光譜術(FTIR)清楚地解析其晶種強化的機理,最後將示範此一全程電化學析鍍流程的自我對位製備電容元件之能力。

並列摘要


The work has found that employing a surface pretreatment by a dual-process of vacuum plasma and chemical aqueous solution, followed by a sequence of seeding process steps, allows 3-nm-size catalytic seeds with a significantly elevated distribution density of twenty-fold, as compared to those without the plasma pretreatment, to be densely grown on SiO2 dielectric layers on silicon wafers. Herein, scanning electron microscopy (SEM) and transmission electron microscopy (TEM) will be employed to analyze the difference in incubation and growth of Co-P islands into a continuous barrier film from the two kinds of seeds. X-ray photoelectron spectroscopy (XPS) and Fourier transformed infrared spectroscopy (FTIR) will be used to clarify the mechanism behind the seeding enhancement. Finally, the capacity of the all-wet, electrochemical seeding and electroless-plating process to fabricate patterns of Cu gated capacitors in a self-aligned manner will be demonstrated.

延伸閱讀