並列摘要
The universal modem architecture with multi-core software-defined radio (SDR) technology is proposed for the physical layer inner processing of orthogonal frequency division multiplexing (OFDM) based wireless communication systems. By localizing the data transmissions between the adjacent application specific instruction set signal processors (ASIP), concatenate memories and concatenate buses are introduced to ease the bandwidth requirement for the data communication among multicores. The proposed transceiver architecture is verified by the electronic system-level (ESL) virtual platform for IEEE 802.11p standard. The performance estimations for other WLAN specs and 3GPP TS36.211 standard are also provided in this paper.
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