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智慧型影像感測器之FPGA設計

摘要


傳統式監控系統只能簡單的監控記錄儲存所有拍攝的影像(包含正常與異常影像),往往只能在監控環境遭到入侵破壞時才被動的處理,單調式的連續記錄儲存所有影像也增加事發後處理上的難度,且監控系統效能常常受限於監控系統之硬體設備。本研究提出一個建構在FPGA(Field Programmable Gate Array)硬體上之智慧型影像感測器設計;系統提供即時性辨識所拍攝的影像,當監控地點或車輛遭到入侵破壞或當意圖入侵監控環境的人或物進入監控點時才記錄儲存相關異常影像。所建構在FPGA上之智慧型影像辨識系統是一獨立的硬體設備,在辨識過程全由硬體執行故可有效的提高系統效能,降低傳統式監控系統因整合軟硬體設備、外掛軟體…等不確定因素所造成的系統效率低落、當機等風險。本研究採用Altera FPGA 硬體與Quartus II、Design Compiler、SOCEncounter、TetraMax…等軟體完整的完成Cell Base 流程,未來系統IC化後,不僅可以提高辨識效能、降低架設監控系統之成本,亦可彈性整合後端之儲存設備。

並列摘要


The traditional surveillance system only can continuously capture all images (including normal images and abnormal ones) at all times. However, because of continuously capturing of images, the degree of difficulty of treatment increased after the invasion happens, and monitoring system efficiency is often limited to the hardware equipment of the monitoring system. This research proposed an intelligent image sensor (IIS) designed by FPGA hardware. The proposed IIS provides a function that distinguishes abnormal images instantly. The system could act immediately when it detects any unusual activities such as illegal invasion or intentional destruction. The proposed IIS designed by FPGA is an independent hardware equipment, and all identification courses carry out by the hardware, so can improve systematic efficiency effectively, improve the monitoring system efficiency of the traditional type. This system is compiled by the hardware Altera FPGA with software Quartus II, Design Compiler, SOCEncounter, and TetraMax, completing Cell Base. When the system is turned into IC in the future, the detecting ability will be enhanced, basic cost of the whole surveillance system will be lowered, and storing mechanism will be done more efficiently.

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