印刷電路板佈局之檔案結構分析與客製化設計

現在的電子產業很競爭，產品若能及早上市，可掌握市場的先機，IC的工作頻率不斷的提高，高速PCB的設計越來越多，PCB的設計都要考慮信號完整性、電源完整性、電磁干擾／電磁相容與熱輻射等問題，電路板佈局工作幾乎佔整個設計週期的80%[1]，所以可從縮短電路板設計週期，來提升電子產品的競爭力。印刷電路板設計的流程中，除了擺置元件、設拉線規範、佈線、檢查底片等工作外，在印刷電路板設計的流程中，有許多浪費時間又容易出錯的工作，例如檢核所用的元件，文字位置的調整，文字大小的調整，檢查焊點等工作，這些工作讓佈線工程師覺得很麻煩又耗時。本研究主要分析印刷電路板佈局檔案結構，評估客制化功能設計的可行性，設計客制化輔助工具，協助佈局工程師。

關鍵字

電路板佈局；資料結構；客制化功能

並列摘要

For PCB Layout The market of electric industry is very competitive. The timing of a product entering the market dominates the profit significantly. Due to the increasing working speed, the designs of the PCB should take overall consideration on signal Integrity, power Integrity, EMI/EMC and heat radiation, etc. It takes about 80% of the design cycle to deal with the PCB layout problem. To promote the competition of an electrical product, the reduction of the PCB design cycle is a feasible solution. In the design flow of a PCB, there are many jobs that needs much time except for placement, constrain setting, layout, checking gerber file etc. for instance, checking footprint, adjusting reference position, adjusting text size, checking the pads etc. these jobs are heavy for the layout engineers. Hence, the project could analyze the structures of the board file. We could valuate the feasibility of the customized function depending on the structures. Farther, we could design the customized functions. This project will get the layout engineers some help to work.