本文利用光電化學蝕刻的方式在室溫下成長多孔矽薄膜當作表面抗反射層來形成PS(porous silicon)/N-S的結構。光電化學蝕刻的方法來成長多孔矽層具有低成本,且經濟效益高與矽製程相容等優點。利用掃描式電子顯微鏡來觀察多孔矽結構,且討論Al/PS/n-Si/Al元件的光電特性,分別量測不照光和照射鹵素燈I-V特性曲線圖,而得到光暗電流比(photo-to-dark current ratio, I(下標 p)/I(下標 d))、整流比(rectification ratio, I(下標 f)/I(下標 d));並利用分光光度計量測多孔矽抗反射層(antireflection layer)的反射率,得到1%的反射率,這個反射率甚低於傳統KOH(potassium hydroxide)蝕刻的金字塔型結構抗反射層。
A porous silicon (PS)/n-Si structure was prepared by using photo-electrochemical etching (PEC), in which the porous silicon acts as an antireflection layer. The PEC method exhibits many advantages, including low cost, highly economical efficiency, and compatibility with Si technology. In this study, scanning-electron microscopy (SEM) was used to investigate the PS structure and fabricate the Al/PS/n-Si/Al structure of a diode. The photo-to-dark-current and rectification ratios were measured by illuminating a halogen lamp on the diode. A low reflectivity of 1 % was achieved by using a spectrophotometer, whereby the reflectivity was much lower than that of conventional KOH (potassium hydroxide) etching.