In designing a digital system, defining the functional specification represents the first corner stone in the whole design life cycle. Since there is not anything precise to verify against and a lot of engineering judgments and tradeoffs are involved in it, it is relatively easy to introduce design errors in it. Furthermore, if a design error occurs in this stage and is not captured earlier enough, then its accumulated effect in the following process could mean 200 times more costly than if found earlier. In this paper, the author surveys various formal methods reported by some researchers in their studies, analyzes their strengths and weakness, in order to gain some insights into this important problem and to set out finding more effective methods to validate system functional specifications. Finally, the author addresses possible future developments of design verification and validation methods for digital systems, and comes to a conclusion that a hybrid method will be necessary as a common practice in doing the validation and verification of the specifications of digital systems.