適用於LINC無線發射器系統之數位信號處理引擎

Digital Signal Processing Engine for LINC Wireless Transmitter System

王奕權(Yi-Chiuan Wang)

指導教授 ： 吳安宇

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2005年)

https://doi.org/10.6342/NTU.2005.10006

摘要

在現今無線通訊系統中，系統的功率消耗是很重要的設計考量。而發射端的功率放大器之功率消耗占系統整體功率消耗的很大一部分。由於功率放大器的非線性特性，設計一個具有高線性度及高功率效率的發射機成為很大的挑戰。功率放大器的線性化技術可以改善發射機的線性度及效率。在眾多線性化的方法之中，LINC技術能夠讓系統採用高效率的非線性功率放大器來進行線性放大，因而大幅提升了發射機的線性度及效率。高頻寬的特性更使得此技術適合應用於3G的寬頻系統之中。
在本論文中，提出了兩種新的LINC系統架構以及適用於其中的數位信號處理引擎。其中包括三個關鍵模組：座標轉換器、反三角函數計算器，以及數位式相位調變器。我們的設計規格是依據WCDMA的發射機規範。在此規範之下，我們提出了新的演算法及電路架構，能夠有效地降低數位信號處理引擎所需的硬體成本。
為了對此數位信號引擎進行驗證，我們使用ADS進行了混合數位類比信號的系統模擬。我們亦使用Verilog來實現我們提出的數位信號處理引擎，以聯電0.18um製程進行電路合成所得面積為0.155mm2，最大時脈可達117MHz。此外，我們並使用FPGA來進行驗證，於示波器與頻譜分析儀上量測輸出結果。經由各方面的模擬與量測，證實我們的設計能夠正確地運作，並符合WCDMA的規範。

關鍵字

功率放大器 ； 線性化 ； 座標旋轉器 ； 反三角函數 ； 數位頻率合成器

並列摘要

The power amplifier (PA) is a very power-hungry device in a modern wireless communication system. Designing a high-linearity and high-power efficiency wireless transmitter is a big challenge because of nonlinear characteristic of the power amplifier. Linearization techniques of power amplifier can be used in the transmitter to improve the linearity and power efficiency of the system.
LINC technique is one of PA linearization methods. By using LINC transmitter architecture, nonlinear power amplifier with high power efficiency can be used to linearly amplify the input signal in a transmitter system, and very high linearity and power efficiency can be achieved. Besides, LINC architecture can offer high bandwidth and this technique is very suitable for 3G applications.
We propose two novel LINC system architectures and their corresponding Digital Signal Processing engines. There are three key modules in the DSP engine: rectangular to polar converter, inverse trigonometric computation module, and digital phase modulator. We design our DSP engine under specification of WCDMA transmitter. New algorithm and hardware architecture is proposed which can reduce the hardware cost efficiently.
In order to verify our DSP engine in the LINC system, we use the tool Advance Design System to perform mixed-mode system simulation. The DSP engine is also implemented by Verilog. From result of synthesis, the area of the DSP engine is 0.155mm2 and the maximum clock frequency is 117MHz. Besides, we use FPGA to verify our design and observe the output signals on the oscilloscope and spectrum analyzer. From the simulation and measurement, we confirm that our DSP engine can work correctly and meet the transmitter specification of WCDMA.

並列關鍵字

power amplifier ； linearization ； CORDIC ； inverse trigonometric ； DDFS ； LINC

參考文獻

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