應用於心電訊號偵測系統之類比數位轉換器

A low power Analog-to-Digital Converter for ECG signal monitoring system application

張瀚文(Han-Wen Chang)

指導教授 ： 呂學士

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2012年)

https://doi.org/10.6342/NTU.2012.10021

摘要

在世界各地的大多數已開發國家，人口老齡化是一個普遍觀察到的現象。我們的國家在數年後，也會看到此現象。而電機電子領域人將研究重點從消費性電子產品轉向生醫應用。在這個趨勢下，我們設計適合應用於生醫系統的類比數位轉換器。

在本論文的第四章，我們介紹一種利用單調式切換電容以減少功耗及採用MOM電容以縮小整體面積的連續漸進式類比數位轉換器。如此一來，我們可以使用更少的晶片面積卻達到和傳統電路一樣的解析度。
在本論文的第五章，我們介紹一種採用傳統架構的單端輸入連續漸進式類比數位轉換器。
在本論文的第六章，我們介紹一種採用第四章架構的優點非同步式控制邏輯及修改第五張的傳統單端架構以搭配二進制錯誤補償機制的單端輸入連續漸進式類比數位轉換器。
這些晶片都是使用TSMC 0.18um 1P6M CMOS的製程實現。

關鍵字

連續漸進式 ； 類比數位轉換器 ； 低功耗 ； 低電壓

並列摘要

Ageing population is a commonly observed phenomenon in most developed countries all over the world. Our country may see the phenomenon in few years.
Electrical engineers have turned their attention from consumer products to application in biomedical. We design ADCs that are suitable for biomedical application under this trend.
In Chapter 4 of this thesis, a low power dual mode SAR ADC is presented which uses monotonic switching procedure to decrease the power consumption and MOM capacitor array that makes the chip area smaller while get the same resolution as the traditional circuit.
In Chapter 5 of this thesis, a low power single-ended SAR ADC is presented which uses conventional structure.
In Chapter 6 of this thesis, a low power single-ended SAR ADC with binary-scaled error compensation is presented which uses the advantage of asynchronous control logic in Chapter 4 and modifies the structure in Chapter 5.
These chips are fabricated by TSMC 0.18u, 1P6M CMOS technology and the measurement results will be shown.

並列關鍵字

Successive approximation ； ADC ； low power ； low supply voltage

參考文獻

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